3D-Port of natural range <>

Joined
Jul 28, 2011
Messages
1
Reaction score
0
Hi,

i would like to create a module (A) with a 3d-array port. To create an array-port i have to use a packge to declare the type of array. I do this like this:

TYPE test_type is array (natural range <>, natural range <>, natural range <>) of std_logic;

I have to use "natural range <>" for all three dimensions because the portwidth is depending on generics passed to A:

entity A is
generic(
gen_1 : natural := 5,
gen_2 : natural := 6,
gen_3 : natural := 7);
port(
matrix : IN test_type(gen_1 downto 0, gen_2 downto 0, gen_3 downto 0) );

The simulation works fine with this, but in synthesis i get "Matrix not supported yet" on the 3D-Port-Line.

Because of the required "natural range <>" i can not use subtype for the declaration in the package, and passing the generics to the package to not use natural range is not possible.

Do you have any idea of getting this to syenthesis?

Best regards,
Jan
 

Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments. After that, you can post your question and our members will help you out.

Ask a Question

Members online

No members online now.

Forum statistics

Threads
473,744
Messages
2,569,483
Members
44,903
Latest member
orderPeak8CBDGummies

Latest Threads

Top