74xx logic libraries?

[apple]

I'd like to get VHDL libraries for 74xx generic logic chips. I know
breadboard design with these chips, and looking at the HDL description
would help me learn

FMF keeps on reporting "page not found" when I try to check out their
models.

 

[backhus]

I'd like to get VHDL libraries for 74xx generic logic chips.  I know
breadboard design with these chips, and looking at the HDL description
would help me learn

FMF keeps on reporting "page not found" when I try to check out their
models.

Hi,
you want to start hardware design with VHDL now, after your experience
with 74xx chips.
Well, that's quite OK, since many of the people here have gone that
way. (mee too)

But let me give you one hint.
Forget most of the things you have done with the 74xx stuff.
Even HDL descriptions of these chips are not really good for learning.
The reason is, that
1) these chips sometimes have a weird structure compared to actual
synchronous design techniques.
2) the descriptions are mostly meant for system simulation purposes,
they are not always synthesizable.

Depending on what new technology you are targeting (CPLD, FPGA, (std.
cell)ASIC) you should work it out the way you did with the old chips
too:
Read the datasheet.
Try to understand the features and quirks of that technology.
Then you are able to design something good.

Just some examples:
From 74xx you are used to having the gate delays in mind. Nowadays the
wires introduce sometimes even higher delays than the gates.
74xx series used a lot of JK-FFs to save logic. That's just not needed
anymore since you are mostly limited to D-FFs (except in asics) and
the synthesis tool will choose the optimal logic-ff combination
anyway.

VHDL in the end is just some way to describe circuits in text form and
you better look at good and useful examples. e.g. here:
"RTL Hardware Design using VHDL" by Pong P. Chu

Have a nice synthesis
Eilert

 

[Dave Higton]

In message <[email protected]>

I'd like to get VHDL libraries for 74xx generic logic chips.  I know
breadboard design with these chips, and looking at the HDL description
would help me learn

[snip]
But let me give you one hint.
Forget most of the things you have done with the 74xx stuff.

I'll second that. The benefit of VHDL is that you can lift your
thought processes to a higher level. Start thinking in terms of
how you want the resulting circuit to /behave/. Let the
synthesis tool generate the gates and flip-flops for you.

Dave

 

[M. Norton]

I'll second that.  The benefit of VHDL is that you can lift your
thought processes to a higher level.  Start thinking in terms of
how you want the resulting circuit to /behave/.  Let the
synthesis tool generate the gates and flip-flops for you.

And I'll add the devil's advocate caveat here (because I'm dealing
with it with a VHDL novice here at the company) that you'd better
investigate a bit into the realm of "synthesizeable VHDL" before you
completely get lost in writing behaviorial code. I'm gently guiding
one engineer back into trying to walk that fine line between
describing higher level behavior and keeping an eye on "how is the
synthesizer going to turn what I just said into flops?"

It's entirely possible to become too enamored with simulation results
and forget that it's got to map into the real world at some point
(unless you're writing a testbench, and then by all means go
crazy ).

Mark Norton

 

[Andy]

But from a modern source, and backed up with some experimentation...
the synthesis tools do get better, and sometimes give pleasant surprises
of the "cool! I didn't think it would support that" variety.

- Brian.

Amen to that!

Andy

 

[M. Norton]

But from a modern source, and backed up with some experimentation...
the synthesis tools do get better, and sometimes give pleasant surprises
of the "cool! I didn't think it would support that" variety.

Oh agreed, though I would rather teach the slightly more conservative
view and then move into the "cool" territory. I've been drilling more
basic concepts like having combinatorial drivers and flop drivers on
the same signal being a "bad thing" and not being able to drive a
signal with both a rising edge flop and falling edge flop and things
of that nature. They simulate but they don't really synthesize into
anything real in an FPGA.

When we get into solid (possibly slow and pedantic) design territory,
then we'll speed back up again into "cool" development .

-- Mark