8bit register with ALU computation

Discussion in 'VHDL' started by stts, Jul 30, 2009.

  1. stts

    stts

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    Register_ALU:
    • the design will contain 8 8-bit registers which can be loaded from an external input;
    • the design will contain a block of logic which will have two 8-bit inputs A[7..0] and B[7..0], and will produce one 8-bit output C[7..0];
    • the output will be formed as
    o A and B, or 00
    o A or B, or 01
    o A plus B, or 10
    o A minus B; 11
    • the operation {logical and, logical or, arithmetic plus, arithmetic minus} will be selected by an external input to the design, called Op_Code[1..0];
    • the output C[7..0] can be
    o loaded back into one of the eight internal registers, or
    o read externally.

    i've ran into some problem with the above statement
    i've created 8 8bit registers with a 3bit multiplexer which i can select which registers i want my input to store into

    but now how do i load the output back to the input registers?

    thanks in advance
     
    stts, Jul 30, 2009
    #1
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