A Problem with Batch Compiling using Makefile

Z

Z.L.

My problem is as follows,

There are one directory containing many .C files. I am trying to write
a makefile to compile all the C files and for each C file there is a
binary file output with same name.

For example, assume there are C files such as `a.c', `b.c', `c.c' in
some directory. After batch compilation, I wish to get the binary
files `a', `b', `c'. Another constraint is that I don't know the file
names in advance.

Just like using wild character under command line mode, I wish to do
that in some way like `g++ *.c -o *'. But I am unfamiliar with
makefile writing.

Could somebody here help me with this problem?

Thanks a lot.

Z.L.
 
T

Tim H

There are one directory containing many .C files. I am trying to write
a makefile to compile all the C files and for each C file there is a
binary file output with same name.

This is the default behavior of make. You should be able to get away
with something as simple as:

all: a b c

Note: this is off topic for this group
 
Z

Z.L.

Sorry for my unrelated post in these two groups, but I don't find the
proper groups that are related to this makefile problem.

In my original post, I have explained there is a constraint that I
don't know file names in advance. In fact I am seeking some way like
wild character of '*' to solve this problem. I know using wildcard
function can get the whole C file names in one directory. But how to
expand the acquired file name string to a loop in which each C file is
one by one compiled to output executive file with the same name?

Thanks a lot.

Z.L.
 
J

Jim Langston

Z.L. said:
Sorry for my unrelated post in these two groups, but I don't find the
proper groups that are related to this makefile problem.

In my original post, I have explained there is a constraint that I
don't know file names in advance. In fact I am seeking some way like
wild character of '*' to solve this problem. I know using wildcard
function can get the whole C file names in one directory. But how to
expand the acquired file name string to a loop in which each C file is
one by one compiled to output executive file with the same name?

Please don't top post, message rearranged.

This is not a C++ problem, this is a batch programming problem. It depeneds
on your platform. Windows, Linux, Mac, OS400, whatever. Ask in a newsgroup
related to batch type programming for your platform.
 
J

James Kanze

Sorry for my unrelated post in these two groups, but I don't
find the proper groups that are related to this makefile
problem.

One of the Unix related groups would probably be acceptable. On
the other hand, unlike C++, there is no "standard" make, not
even a de facto one, so you might prefer to choose one (GNU make
is by far the most widely used portable one), and ask in a
mailing list or group specifically oriented to that make.
(There is a simple solution to your problem in GNU make, but it
won't work in most other makes.)
In my original post, I have explained there is a constraint
that I don't know file names in advance. In fact I am seeking
some way like wild character of '*' to solve this problem. I
know using wildcard function can get the whole C file names in
one directory. But how to expand the acquired file name string
to a loop in which each C file is one by one compiled to
output executive file with the same name?

If you're using GNU make, see
http://www.gnu.org/software/make/manual/, and particularly the
sections on functions and the sections for defining and
redefining pattern rules. (Both of these functionalities are
GNU make specific, and not generally present in other makes.)
GNU make will also expand wildcards directly in certain
circumstances, although I generally prefer doing it explicitly,
using the $(wildcard ...) function. In your case, I'd probably
use something like:

sources = $(wildcard *.C)
binaries = $(patsubst %.C,%,$(sources))

all : $(binaries)

% : %.C
... [rule to make a binary from a .C]

Having said that, I'm very leary of such things. In my
experience, someone always ends up adding a little test source
in the directory, which shouldn't be compiled. IMHO, it's much
better to maintain an explicit list of targets (or target
sources) somewhere independantly of the actual directory
contents.
 

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