Access Type Unsupported ISE6.2.03i

Discussion in 'VHDL' started by Benjamin Todd, Oct 19, 2004.

  1. I've a problem using the image_pb.vhd package from vhdlcohen... I think it's
    a problem to do with Xilinx ISE...

    for example:

    function Image(In_Image : Integer) return String is
    variable L : Line; -- access type
    variable W : String(1 to 32) := (others => ' ');
    -- Long enough to hold a time string
    begin
    Std.TextIO.WRITE(L, in_image);
    W(L.all'range) := L.all;
    Deallocate(L);
    return W;
    end Image;

    fails a syntax check for the reason: "/image_pb.vhd Line 97. Access Type
    unsupported."
    this happens at every point where the ".all" is used - I never had this
    problem before: Anyone any suggestions? It's most likely something
    completely simple that's staring me in the face!

    Thanks in advance.
    Ben
    Benjamin Todd, Oct 19, 2004
    #1
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  2. Benjamin Todd wrote:
    > I've a problem using the image_pb.vhd package from vhdlcohen... I think it's
    > a problem to do with Xilinx ISE...
    >
    > for example:
    >
    > function Image(In_Image : Integer) return String is
    > variable L : Line; -- access type
    > variable W : String(1 to 32) := (others => ' ');
    > -- Long enough to hold a time string
    > begin
    > Std.TextIO.WRITE(L, in_image);
    > W(L.all'range) := L.all;
    > Deallocate(L);
    > return W;
    > end Image;
    >
    > fails a syntax check for the reason: "/image_pb.vhd Line 97. Access Type
    > unsupported."
    > this happens at every point where the ".all" is used - I never had this
    > problem before: Anyone any suggestions? It's most likely something
    > completely simple that's staring me in the face!
    >
    > Thanks in advance.
    > Ben
    >
    >

    Your code is for simulation only -> Xilinx XST synthesizer can do
    nothing with Std.TextIO package !

    Laurent
    www.amontec.com
    Laurent Gauch, Oct 19, 2004
    #2
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  3. No, I'm doing a syntax check, not a synthesis.

    It's for a testbench. =)

    "Laurent Gauch" <> wrote in message
    news:...
    > Benjamin Todd wrote:
    > > I've a problem using the image_pb.vhd package from vhdlcohen... I think

    it's
    > > a problem to do with Xilinx ISE...
    > >
    > > for example:
    > >
    > > function Image(In_Image : Integer) return String is
    > > variable L : Line; -- access type
    > > variable W : String(1 to 32) := (others => ' ');
    > > -- Long enough to hold a time string
    > > begin
    > > Std.TextIO.WRITE(L, in_image);
    > > W(L.all'range) := L.all;
    > > Deallocate(L);
    > > return W;
    > > end Image;
    > >
    > > fails a syntax check for the reason: "/image_pb.vhd Line 97. Access Type
    > > unsupported."
    > > this happens at every point where the ".all" is used - I never had this
    > > problem before: Anyone any suggestions? It's most likely something
    > > completely simple that's staring me in the face!
    > >
    > > Thanks in advance.
    > > Ben
    > >
    > >

    > Your code is for simulation only -> Xilinx XST synthesizer can do
    > nothing with Std.TextIO package !
    >
    > Laurent
    > www.amontec.com
    Benjamin Todd, Oct 19, 2004
    #3
  4. Benjamin Todd wrote:
    > No, I'm doing a syntax check, not a synthesis.
    >
    > It's for a testbench. =)
    >

    Consider using modelsim "vcom"
    for a syntax check.

    -- Mike Treseler
    Mike Treseler, Oct 19, 2004
    #4
  5. Ah, thanks!!!
    Turns out that ModelSim will compile it.

    Ben



    "Mike Treseler" <> wrote in message
    news:...
    > Benjamin Todd wrote:
    > > No, I'm doing a syntax check, not a synthesis.
    > >
    > > It's for a testbench. =)
    > >

    > Consider using modelsim "vcom"
    > for a syntax check.
    >
    > -- Mike Treseler
    Benjamin Todd, Oct 19, 2004
    #5
  6. "Benjamin Todd" <> wrote in message news:<cl2ma6$jq5$>...
    > No, I'm doing a syntax check, not a synthesis.
    >
    > It's for a testbench. =)


    If the type is not supported for synthesis then it is very likely it
    will not pass a syntax test for a synthesis tool. The alternative
    would be for the synthesis tool to pass unsynthesizable, but correct,
    VHDL code and then give you an error message when you tried to
    synthesize it. You should run the syntax test on your simulation
    tool, after all, that is where you will be using your test bench.

    Charles

    >
    > "Laurent Gauch" <> wrote in message
    > news:...
    > > Benjamin Todd wrote:
    > > > I've a problem using the image_pb.vhd package from vhdlcohen... I think

    > it's
    > > > a problem to do with Xilinx ISE...
    > > >
    > > > for example:
    > > >
    > > > function Image(In_Image : Integer) return String is
    > > > variable L : Line; -- access type
    > > > variable W : String(1 to 32) := (others => ' ');
    > > > -- Long enough to hold a time string
    > > > begin
    > > > Std.TextIO.WRITE(L, in_image);
    > > > W(L.all'range) := L.all;
    > > > Deallocate(L);
    > > > return W;
    > > > end Image;
    > > >
    > > > fails a syntax check for the reason: "/image_pb.vhd Line 97. Access Type
    > > > unsupported."
    > > > this happens at every point where the ".all" is used - I never had this
    > > > problem before: Anyone any suggestions? It's most likely something
    > > > completely simple that's staring me in the face!
    > > >
    > > > Thanks in advance.
    > > > Ben
    > > >
    > > >

    > > Your code is for simulation only -> Xilinx XST synthesizer can do
    > > nothing with Std.TextIO package !
    > >
    > > Laurent
    > > www.amontec.com
    Charles M. Elias, Oct 19, 2004
    #6
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