Alu

Discussion in 'VHDL' started by qwerty321, Dec 11, 2009.

  1. qwerty321

    qwerty321

    Joined:
    Dec 9, 2009
    Messages:
    18
    Hello
    I need to write a vhdl code for an 8 bit ALU..the problem is that i must implement a multiplier in this ALU(that has an output of 16 bits) which means that my mutliplexer in the ALU has an output of 16 bits..I also hav to implement an adder...i want to know how can i do the adder if u know what i mean?
    ex:

    suppose my sum is 10110000 i have to make it 1111111110110000 because 10110000 is negative number and i have to make the output 16 bits..
    thank you
    qwerty321, Dec 11, 2009
    #1
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  2. qwerty321

    qwerty321

    Joined:
    Dec 9, 2009
    Messages:
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    please help me when i test the thing it doesn't work for the bits(from 15 downto 0) i get something like UUUUUUUU1000 or XXXXXX100..
    is this statement right?

    g2: for j in 8 to 15 generate
    U2:S(j)<='1' when S(7)='1';
    end generate;

    g3: for j in 8 to 15 generate
    U3:S(j)<='0' when S(j)<='0' ;
    end generate;
    qwerty321, Dec 11, 2009
    #2
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