Thanks for interestign link.
[1] Is Arbiter pure comb logic? If yes, shall its comb logic delay be
constrained to within one clock cycle?
In general no. Only trivial static priority arbiter can be a simple
combinational logic. In practice the aribters need to store
a prior state (or states) information to modify the priority
and this requires sequential logic/memory etc.
The priority is made dynamic to achieve some particular goals:
for example to prevent starvation of low priority requesters while
still give low latency to high priority ones.
It all very much depends on application.
Network devices hve really elaborate arbiter algorithms.
[2] Shall one request and one grant both hold only one clock cycle?
Obviously request will be active for several clock cycles.
This is beacuse some waiting time for acknowledge is necessary.
(If not then why would we need arbiter?)
Acknowledge is one clock cycle but this is because there is
no beneft in making it any longer.
One cycle acknowledge is "atomic"
BTW Paper specifies many more advanced schemes where
acknowledge is delayed and a pointers are used in requester
to figure out how many requests have been acknowledged.
Cheers,
Przemek
Hi all,
I have two problem when reading the paper from
http://www.siliconlogic.com/pdf/Arbiters_MattWeber_SLE.pdf
[1] Is Arbiter pure comb logic? If yes, shall its comb logic delay be
constrained to within one clock cycle?
[2] Shall one request and one grant both hold only one clock cycle?
Best regards,
Davy