Array issues

Discussion in 'VHDL' started by bryfu, Feb 24, 2009.

  1. bryfu

    bryfu

    Joined:
    Feb 24, 2009
    Messages:
    1
    Hi all,

    I have some issues when i do my coding in VHDL.

    1st: i instantiate array as follows:

    "type data_array is array (1 to 1) of STD_LOGIC_VECTOR (64 DOWNTO 0);
    signal data: data_array;"
    ............
    ............
    after which i use the array as :

    "data <= PR_dout;"

    where PR_dout is an input of 65 bits long. But i get error that goes :

    "Type of data is incompatible with type of PR_dout"

    I would appreciate very much if some one can help me in this .

    Thank u.
    bryfu, Feb 24, 2009
    #1
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  2. bryfu

    joris

    Joined:
    Jan 29, 2009
    Messages:
    152
    Maybe you meant,

    data(1) <= PR_dout;
    joris, Feb 24, 2009
    #2
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