A
adarsh arora
I have used NCSim,modelsim,vcs simulators for running the following
continous assign statements:
assign #(rise,fall) b = a;
i found very different beh. in vcs simulator(by Synopsys) from
modelsim and ncsim(Verilog-XL) behaviour.
What should be actual beh. of the above statement.
Shall the new value(event) of a should override its previous scheduled
assignment or something else.
continous assign statements:
assign #(rise,fall) b = a;
i found very different beh. in vcs simulator(by Synopsys) from
modelsim and ncsim(Verilog-XL) behaviour.
What should be actual beh. of the above statement.
Shall the new value(event) of a should override its previous scheduled
assignment or something else.