avoiding race

[crazyrdx]

I read a program which has a counter implemented as shown. Can someone
tell me, what this means? and why cant I increment and reset the
counter with separate if conditions

-- increment and reset the counter synchronously to avoid race
conditions
if incCnt = '1' then
cnt <= cnt + 1;
elsif rstCnt = '1' then
cnt <= (others => '0');
end if;

Thank you

RP

 

[Muralidharan]

If you have seperate if conditions then when both are true cnt will be
assigned with the incremented value as well as 0 as per the logic this
could cause race condition.

 

[crazyrdx]

thanks! got it...

RP

 

[jens]

Assuming that the posted statements appear within a clocked process...

Separate IF conditions will not cause any race conditions; the process
will use the last signal assignment.

In the example, incCnt will take precedence over rstCnt. If the IF
statements were separated and left in the same order, rstCnt would take
precedence.

Using the IF/ELSIF construct makes the designer's intentions very
clear, using two IF statements might not.

The comment about incrementing and resetting the counter synchronously
to avoid race conditions means that it's done synchronously as opposed
to asynchronously. That's a good thing, as asynchronous designs should
be avoided at all costs unless you're an asynchronous design expert and
your tools support asynchronous designs.