Basic file read access using VHDL

Discussion in 'VHDL' started by Derdonn, Jun 9, 2010.

  1. Derdonn

    Derdonn

    Joined:
    Jun 9, 2010
    Messages:
    2
    Hello,

    for the first time I have to make advanced testbenches accessing complex files. So i need to reach a position in the file that is flaged with markers like this

    ....
    ==Raw Data==
    01010101010101
    10010101010101
    ....
    ==Encoded Data==
    01010101010101
    10010101010101
    ....

    but I'm struggling with strings that I'm not used to manipulate. I can now extract vectors from files thanks to a package I found here : web.archive.org/web/20070204123448/members.aol.com/vhdlcohen/vhdl/Models.html

    but the thing I'm not able to do is to implement this algorithm...

    open the file
    while( not(endoffile) and (my_string /= "==Encoded Data==")) {
    read a line
    }
    if endoffile return error;
    read a line
    register( my_range ) <= string_to_vector(my_line)


    my main concern is the string comparison as "my_string" may be of any size while "==Encoded Data==" is of defined length so the compiler don't even let me compile this.

    As this is probably a piece of cake for some of you, i decided to ask for help. Is there a common way to do what i'm trying to do? Could someone show me an example please?

    Thanks!
     
    Derdonn, Jun 9, 2010
    #1
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  2. Derdonn

    joris

    Joined:
    Jan 29, 2009
    Messages:
    152
    Maybe a bit "lazy", but I would try using another program language to translate the input files into vhdl files (describing packages), which I'd then "use" in the main testbench description :)
     
    joris, Jun 9, 2010
    #2
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  3. Derdonn

    Derdonn

    Joined:
    Jun 9, 2010
    Messages:
    2
    Thanks but it doesn't work for me as my data can't be hardcoded.
    There is probably a simple way to do what i'm trying to do.

    Did anybody ever made a string comparison? (ex: if my_string = "foo" then ... )
     
    Derdonn, Jun 10, 2010
    #3
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