Beginner Question

Discussion in 'VHDL' started by David Callaghan, Nov 10, 2004.

  1. Hi Guys

    I'm new to VHDL and have a specific problem to try. Once I know what
    I want to do will fit into the chosen PLD I can proceed and get the
    hardware made.

    The PLD I have in mind is a Xilinx Spartan series

    What I need to do is:

    * Run a single clock / counter @ 1MHz
    * Have approx 200 timing capture inputs
    * Read the time of transition of the timing inputs and store this for
    processing with a microcontroller.

    All the inputs will transition withing 10ms of the first

    I am currently trawling through tutorials on VHDL, but there is a
    steep initial learning curve.

    I would appreciate it if someone could rough out how best to achieve
    this in VHDL, and what part would fit it all in.

    PS I am familiar with ABL

    Best regards
    David Callaghan
     
    David Callaghan, Nov 10, 2004
    #1
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  2. David Callaghan wrote:


    > I am currently trawling through tutorials on VHDL, but there is a
    > steep initial learning curve.


    Consider starting with a simulator to
    try small examples.

    > I would appreciate it if someone could rough out how best to achieve
    > this in VHDL, and what part would fit it all in.


    It will fit in any fpga with that many pins.
    Here's a related example:
    http://groups.google.com/groups?hl=en&lr=&q=vhdl edge_count stadler
    Get that running on your simulator first,
    then make changes one at a time. Good luck.

    -- Mike Treseler
     
    Mike Treseler, Nov 10, 2004
    #2
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