bidirectional bus problem

Discussion in 'VHDL' started by fatihtir, Apr 4, 2012.

  1. fatihtir

    fatihtir

    Joined:
    Apr 4, 2012
    Messages:
    1
    Hello all,

    Could you please tell me the difference between two lines below:

    sram_da <= write_data when (sram_read='0') else "ZZZZZZZZZZZZZZZZ";
    sram_da <= "ZZZZZZZZZZZZZZZZ" (sram_read='1) else write_data;

    I used the first line for reading from sram, but simulation didn't showed expected result (i have an sram vhld model also). After long hours of examination and trying, when i replaced it with second line, it was ok. But I can't understand why the first line is wrong.

    I appreciate your help.

    Regards.


    --
     
    fatihtir, Apr 4, 2012
    #1
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  2. fatihtir

    tomeko

    Joined:
    Apr 6, 2012
    Messages:
    1
    Hi Fatihtir,
    :listen:
    what type is the sram_read signal in your project ?
    If it is std_logic, then bear in mind that it can have 9 possible values
    (besides '0' and '1', also 'H', 'L', '-', 'X', 'Z', 'U', 'W').
    This might justify the resuts of your simulation (perhaps).
    Regards.
     
    tomeko, Apr 6, 2012
    #2
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