Bit reversing

[Mad I.D.]

....
a : in std_logic_vector(3 downto 0);
....
signal abr : std_logic_vector (3 downto 0);

abr <= a(0)&a(1)&a(2)&a(3); --OK
abr <= a(0 to 3); --NOT OK

Why not OK? Thank you !

By the way, br for bit reversed

 

[Ken Cecka]

...
a : in std_logic_vector(3 downto 0);
...
signal abr : std_logic_vector (3 downto 0);

abr <= a(0)&a(1)&a(2)&a(3); --OK
abr <= a(0 to 3); --NOT OK

Why not OK? Thank you !

By the way, br for bit reversed

Not sure I can answer the why - that's just how the language works. Up vectors and down vectors are different types and you can't mix-and-match syntax.

You can automate the reversal with a function though:

FUNCTION reverse(a : IN STD_LOGIC_VECTOR) RETURN STD_LOGIC_VECTOR IS
VARIABLE result : STD_LOGIC_VECTOR(a'RANGE);
ALIAS aa : STD_LOGIC_VECTOR(a'REVERSE_RANGE) IS a;
BEGIN
FOR i IN aa'RANGE LOOP
result(i) := aa(i);
END LOOP;
RETURN result;
END;

....

abr <= reverse(a);

Ken