bountary scan with JTAG

Discussion in 'VHDL' started by Matt Clement, Mar 6, 2006.

  1. Matt Clement

    Matt Clement Guest

    Can anyone recommend some rea$onable software for doing JTAG boundary scan?
    I have a design with some CPLD's that are Boundary scan capable so I thought
    it would be a nice way to look for shorts or opens on the boards. But I
    certainly am not looking to pay thousands of dollars for it. I have
    downloaded the files defining the boundary from Altera's site, but now I
    need the software to use it......preferably windows based. I could boot
    linux if that is the only option.

    Thanks
     
    Matt Clement, Mar 6, 2006
    #1
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