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Workshop on Exploiting Parallelism with Transactional Memory
and other Hardware Assisted Methods
to be held in conjunction with CGO 2008
April 6, 2008, Boston, MA
EPHAM 2008 will provide a forum for compiler and processor
architecture
researchers to exchange ideas for leveraging hardware assistance to
break down traditional barriers to exploiting parallelism. The
workshop
will focus on compilation techniques for exploiting parallelism in
emerging multi-core and multi-threaded architectures with a particular
focus on the use of transactional memory to overcome traditional
barriers to parallelization. Current trends in micro-processor
architecture clearly point to a tapering off of clock frequencies, and
a
shift toward supporting many cores and threads. This change makes the
compiler's task of extracting and exploiting parallelism in
applications
even more important. Recognizing various difficulties in
parallelization, implementations are emerging that attempt to provide
various forms of hardware assist for the same. One of these
techniques,
transactional memory, has drawn significant interest in both industry
and academia. Transactional memory will be a focus, but other
techniques
to solve this problem are also of interest. Topics of interest
include,
but are not limited to the following.
* Novel optimizations using transactional memory
* Speculative parallelization and other speculative methods
* Ideas for implementing transactional memory in hardware or
software
* Hybrid techniques for designing and using transactional memory
* Language constructs to enable programming with transactional
memory
* Run-time techniques to overcome memory aliasing using
transactional memory
* New ideas for transaction failure control and avoidance
* Debugging programs that exploit transactional memory
* Performance analysis and tools related to transactional
parallelization
* Other hardware-assisted methods for extracting and exploiting
parallelism
*Important Dates*
Extended abstract due: Monday, January 28, 2008
Acceptance Notification: Monday, February 18, 2008
Final version due: Monday, March 3, 2008
*Submission Guidelines*
Extended abstracts of 6-10 pages may be submitted using any format.
The
abstract should clearly state the problem being studied, the methods
used, and the results. If the results are preliminary, the authors
should state their expectation for the final results. To submit,
please
send a pdf of your submission to (e-mail address removed) Final submissions
should
use the standard ACM conference format (two columns with 9 pt Times
Roman font, etc.).
*More Information*
EPHAM 2008 website: http://www.opensparc.net/conf/epham2008/
CGO 2008 website: http://www.cgo.org/
Questions? Send e-mail to: (e-mail address removed)
and other Hardware Assisted Methods
to be held in conjunction with CGO 2008
April 6, 2008, Boston, MA
EPHAM 2008 will provide a forum for compiler and processor
architecture
researchers to exchange ideas for leveraging hardware assistance to
break down traditional barriers to exploiting parallelism. The
workshop
will focus on compilation techniques for exploiting parallelism in
emerging multi-core and multi-threaded architectures with a particular
focus on the use of transactional memory to overcome traditional
barriers to parallelization. Current trends in micro-processor
architecture clearly point to a tapering off of clock frequencies, and
a
shift toward supporting many cores and threads. This change makes the
compiler's task of extracting and exploiting parallelism in
applications
even more important. Recognizing various difficulties in
parallelization, implementations are emerging that attempt to provide
various forms of hardware assist for the same. One of these
techniques,
transactional memory, has drawn significant interest in both industry
and academia. Transactional memory will be a focus, but other
techniques
to solve this problem are also of interest. Topics of interest
include,
but are not limited to the following.
* Novel optimizations using transactional memory
* Speculative parallelization and other speculative methods
* Ideas for implementing transactional memory in hardware or
software
* Hybrid techniques for designing and using transactional memory
* Language constructs to enable programming with transactional
memory
* Run-time techniques to overcome memory aliasing using
transactional memory
* New ideas for transaction failure control and avoidance
* Debugging programs that exploit transactional memory
* Performance analysis and tools related to transactional
parallelization
* Other hardware-assisted methods for extracting and exploiting
parallelism
*Important Dates*
Extended abstract due: Monday, January 28, 2008
Acceptance Notification: Monday, February 18, 2008
Final version due: Monday, March 3, 2008
*Submission Guidelines*
Extended abstracts of 6-10 pages may be submitted using any format.
The
abstract should clearly state the problem being studied, the methods
used, and the results. If the results are preliminary, the authors
should state their expectation for the final results. To submit,
please
send a pdf of your submission to (e-mail address removed) Final submissions
should
use the standard ACM conference format (two columns with 9 pt Times
Roman font, etc.).
*More Information*
EPHAM 2008 website: http://www.opensparc.net/conf/epham2008/
CGO 2008 website: http://www.cgo.org/
Questions? Send e-mail to: (e-mail address removed)