clock generator for master slave interface

Discussion in 'VHDL' started by hari, Apr 16, 2004.

  1. hari

    hari Guest

    hi
    i am creating a pcm master slave interface in bluetooth and the
    coding is done in vhdl.

    now the master interface generates three frequecies through a clock
    generator and they aree 128 khz,256 khz and 8 khz.

    the slave interface accepts the same three frequencies from a codec.

    now i have to interface the clock inputs of the pcm interface from the
    clock generator or from the codecs.i have to make this decision
    depending on the signal from a processor which indicates whether the
    pcm will act as master or slave.so i need to design the control
    circuit for interfacing the clock inputs of pcm interface from the
    clock generator or codecs
    can any one give me ideas regarding how to go about it

    i also need help for generating the above three frequencies from a
    3.2 kHz.
    clock
    thanks
    hariprasath
     
    hari, Apr 16, 2004
    #1
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  2. hari

    Sandy Guest

    Hi Hari,
    Ur Interface should take both the clocks from the clock generator
    and
    the codec.
    The clock from the clock generator should be used as an internal
    clock
    for the block. The data which comes from the codec with the clock
    should be
    synchronized to the internal clock from the clock gen(may be using a
    fifo) and then used for internal processing.

    Hope this helps.

    -Sandy.

    (hari) wrote in message news:<>...
    > hi
    > i am creating a pcm master slave interface in bluetooth and the
    > coding is done in vhdl.
    >
    > now the master interface generates three frequecies through a clock
    > generator and they aree 128 khz,256 khz and 8 khz.
    >
    > the slave interface accepts the same three frequencies from a codec.
    >
    > now i have to interface the clock inputs of the pcm interface from the
    > clock generator or from the codecs.i have to make this decision
    > depending on the signal from a processor which indicates whether the
    > pcm will act as master or slave.so i need to design the control
    > circuit for interfacing the clock inputs of pcm interface from the
    > clock generator or codecs
    > can any one give me ideas regarding how to go about it
    >
    > i also need help for generating the above three frequencies from a
    > 3.2 kHz.
    > clock
    > thanks
    > hariprasath
     
    Sandy, Apr 20, 2004
    #2
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