Hi,
I'm using a Spartan IIe for my design.
One of the tasks is to create a high precision clock of 12.288 MHz out of 40.96MHz. As you can easily see there' a factor of 3.333 between the two frequencies.
That's the point were the problem comes in: Because of the fact that the output mustn't jitter fractional division can't be used to solve the problem.
So my idea was to use the on board DLLs of the Spartan IIe and do the following:
Divide the input frequency of 40.96MHz by 2.5 with the help of a DLL to 16.384 MHZ.
Divide this frequeny again to get 8.192MHz or 4.096 MHz.
After that use the phase shifted outputs and combine them to get an output frequency of 12.288 MHz.
So far the theory but my problem is that the on board DLLs only allow phase shifting in steps of 90° but I need 120° to solve my problem.
Is there any good idea how to solve that problem or another good approach to multiply the frequency by 1.5 or 3?
Any suggest is very welcomed !!!
Regards Christian
I'm using a Spartan IIe for my design.
One of the tasks is to create a high precision clock of 12.288 MHz out of 40.96MHz. As you can easily see there' a factor of 3.333 between the two frequencies.
That's the point were the problem comes in: Because of the fact that the output mustn't jitter fractional division can't be used to solve the problem.
So my idea was to use the on board DLLs of the Spartan IIe and do the following:
Divide the input frequency of 40.96MHz by 2.5 with the help of a DLL to 16.384 MHZ.
Divide this frequeny again to get 8.192MHz or 4.096 MHz.
After that use the phase shifted outputs and combine them to get an output frequency of 12.288 MHz.
So far the theory but my problem is that the on board DLLs only allow phase shifting in steps of 90° but I need 120° to solve my problem.
Is there any good idea how to solve that problem or another good approach to multiply the frequency by 1.5 or 3?
Any suggest is very welcomed !!!
Regards Christian