clockdivider with enable

Discussion in 'VHDL' started by jo, May 15, 2005.

  1. jo

    jo Guest

    I need to make a vga controller but I have a problem.
    The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
    640 by 480 pixels.
    but the clock input should be the real clock 48 Mhz en there's also an
    enable input and by this input we can get the correct(needed)
    frequency of 24 MHz.
    I don't know how to do this and how this exactly works,but it has to
    be done this way,maybe somebody can write a little bit code for me?
    Are explain howthis thing works.
    thanks a lot!!
     
    jo, May 15, 2005
    #1
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  2. jo

    james Guest

    On 15 May 2005 12:41:59 -0700, (jo) wrote:

    >I need to make a vga controller but I have a problem.
    >The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
    >640 by 480 pixels.
    >but the clock input should be the real clock 48 Mhz en there's also an
    >enable input and by this input we can get the correct(needed)
    >frequency of 24 MHz.
    >I don't know how to do this and how this exactly works,but it has to
    >be done this way,maybe somebody can write a little bit code for me?
    >Are explain howthis thing works.
    >thanks a lot!!

    *****

    A simple JK flip flop will divide by 2 nicely. That can be made from
    two D flip flops.

    james
     
    james, May 15, 2005
    #2
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  3. jo

    Guest

    I know how to divide a clock buth how does this works in combination
    with the enable input?
     
    , May 16, 2005
    #3
  4. jo

    Stefcio Z. Guest

    On 15 May 2005 12:41:59 -0700, (jo) wrote:

    >I need to make a vga controller but I have a problem.
    >The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
    >640 by 480 pixels.
    >but the clock input should be the real clock 48 Mhz en there's also an
    >enable input and by this input we can get the correct(needed)
    >frequency of 24 MHz.
    >I don't know how to do this and how this exactly works,but it has to
    >be done this way,maybe somebody can write a little bit code for me?
    >Are explain howthis thing works.
    >thanks a lot!!


    Should it be something like this?

    architecture PreScaler of PreScaler is
    signal Qint: STD_LOGIC_VECTOR(26 downto 0);
    begin

    process (CLK, RESET)
    begin
    if RESET = '1' then
    Qint <= (others => '0');
    elsif Clk'event and Clk='1' then
    if CEI = '1' then
    if Qint = 1 then
    Qint <= (others => '0');
    else
    Qint <= Qint + 1;
    end if;
    end if;
    end if;
    end process;

    CEO <= '1' when Qint = 1 else '0';

    end PreScaler;

    Next, you should map port CEO to CE in your design.

    --
    Lukasz Z.
     
    Stefcio Z., May 16, 2005
    #4
  5. jo

    james Guest

    On 16 May 2005 00:33:58 -0700, wrote:

    >I know how to divide a clock buth how does this works in combination
    >with the enable input?

    ****

    A simple method though not always the best way is to gate the clock
    with an "AND" gate.

    james
     
    james, May 17, 2005
    #5
  6. HI Jo,

    > The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz
    > but the clock input should be the real clock 48 Mhz en there's also

    an
    > enable input


    What are you targetting for FPGA or ASIC ?
    And from where is this enable input coming(I mean relation between
    enable and clk).

    -- Mohammed A Khader.


    jo wrote:
    > I need to make a vga controller but I have a problem.
    > The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
    > 640 by 480 pixels.
    > but the clock input should be the real clock 48 Mhz en there's also

    an
    > enable input and by this input we can get the correct(needed)
    > frequency of 24 MHz.
    > I don't know how to do this and how this exactly works,but it has to
    > be done this way,maybe somebody can write a little bit code for me?
    > Are explain howthis thing works.
    > thanks a lot!!
     
    Mohammed A khader, May 17, 2005
    #6
  7. jo

    Guest

    i'm targetting fpga.
    But I've decided to leave the enable foe now ,since nothing is coming
    on the screen.
    I'm gonna post it as a new topic vga controller.
    Maybe you can have a quick look to see if you notice something wrong.

    thanks for the help
     
    , May 17, 2005
    #7
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