COMPONENT fjkce and warning

Discussion in 'VHDL' started by ontos, May 8, 2007.

  1. ontos

    ontos

    Joined:
    Mar 15, 2007
    Messages:
    12
    Hallo all.
    I use this component
    component fjkce
    port(CLR,CE, J,K,C:IN BIT; Q: OUT BIT);
    end component;


    And when i compile Code (Xilinx ISE), become this warning:
    WARNING:Xst:2036 - Inserting OBUF on port <q> driven by black box <fjkce>. Possible simulation mismatch.

    For example when i use fd, and3, or3... i become this warning not. With PORT declaration is all good. I click on "View Technology Schematic" to see schematic, and there it's all right. But respecting this warning i can't normaly use Wave Form Testbench, because output ist passive....
     
    ontos, May 8, 2007
    #1
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Karuppasamy

    com+ component and Component Service

    Karuppasamy, Jan 13, 2004, in forum: ASP .Net
    Replies:
    0
    Views:
    616
    Karuppasamy
    Jan 13, 2004
  2. Karuppasamy

    com+ component and Component Service

    Karuppasamy, Jan 13, 2004, in forum: ASP .Net
    Replies:
    1
    Views:
    2,537
  3. Pete Becker
    Replies:
    0
    Views:
    1,382
    Pete Becker
    Feb 10, 2005
  4. B. Williams

    warning C4267 and warning C4996

    B. Williams, Oct 26, 2006, in forum: C++
    Replies:
    17
    Views:
    2,640
    robertwessel2@yahoo.com
    Oct 27, 2006
  5. Miguel Minora
    Replies:
    1
    Views:
    153
    Miguel Minora
    Jan 11, 2005
Loading...

Share This Page