configurations and generate

Discussion in 'VHDL' started by Ralf Hildebrandt, Sep 24, 2004.

  1. Hi all!

    I have to write the configuration for a component, that contains some
    subcomponents, that are instanced depending on generic parameters. Let
    me give a theoretical example:


    architecture behavior of top_component is

    component subcomp
    -- generic / port declaration
    end component;


    begin

    gen_label_1 : if (gen_param=1) generate
    instance_name_1 : subcomp
    generic map(
    ... );
    port map(
    ... );
    end generate;

    gen_label_2 : if (gen_param=2) generate
    instance_name_2 : subcomp
    generic map(
    ... );
    port map(
    ... );
    end generate;

    -- and so on...

    end behavior;


    The configuration can be written as:

    for behavior
    for gen_label_1
    for instance_name_1: subcomp use entity lib.subcomp(behavior);
    end for; -- instance_name_1
    end for; -- gen_label_1
    for gen_label_2
    for instance_name_2: subcomp use entity lib.subcomp(behavior);
    end for; -- instance_name_2
    end for; -- gen_label_2
    -- and so on...
    end for; -- behavior


    If there are a lot of instances the configuration gets huge, too. In my
    special case I want the same configuration for all instances of subcomp.
    Additionally I have a second subcomponent (subcomp2), that is used quite
    similar: many instances depending on generate statements. For subcomp2
    everytime the same configuration is needed, too.
    A for-generate is impossible, because of the unique port map of each
    instance. So for simplifying the configuration I tried something like:

    for behavior
    for all
    for all
    subcomp use entity lib.subcomp(behavior);
    subcomp2 use entity lib.subcomp2(behavior);
    end for; -- all
    end for; -- all
    end for; -- behavior

    But this is invalid. So my concluded question is:

    Is there a way to say "take everytime this configuration for an instance
    independet from logic depth of the block/generate labels"?


    Ralf
     
    Ralf Hildebrandt, Sep 24, 2004
    #1
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  2. Ralf Hildebrandt <> wrote in message news:<>...
    >
    > But this is invalid. So my concluded question is:
    >
    > Is there a way to say "take everytime this configuration for an instance
    > independet from logic depth of the block/generate labels"?


    See pg 325 in Ashenden 2e,
    about using a config declaration per entity.
    See also:
    http://groups.google.com/groups?q=v...hy molenkamp OR fitch OR menchini OR ashenden

    -- Mike Treseler
     
    Mike Treseler, Sep 25, 2004
    #2
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  3. Mike Treseler wrote:

    >>Is there a way to say "take everytime this configuration for an instance
    >>independet from logic depth of the block/generate labels"?


    > See pg 325 in Ashenden 2e,
    > about using a config declaration per entity.


    As this book is not so easily available for me, I could only read your
    recommended groups.google - links.

    > See also:
    > http://groups.google.com/groups?q=v...hy molenkamp OR fitch OR menchini OR ashenden


    One of these links is
    http://groups.google.com/groups?q=v...F-8&selm=&rnum=2
    It says (like I said, too) that a generate statement infers one level of
    logical depth and therefore an component instance within a generate
    statement is 2 levels deeper.
    ....
    for gen_label_1
    for instance_name_1: subcomp use entity lib.subcomp(behavior);
    end for; -- instance_name_1
    end for; -- gen_label_1
    ....
    And if I read the related thread for this article, I only can find the
    answer, that there is no way to specify the configuration for a block
    deeper than one level away in general. Sorry, am I blind, or is this the
    only answer?


    Ralf
     
    Ralf Hildebrandt, Oct 1, 2004
    #3
  4. Ralf Hildebrandt wrote:
    > Is there a way to say "take everytime this configuration for an instance
    > independet from logic depth of the block/generate labels"?


    Not within a configuration I'm afraid. You'll either have to specify each
    one individually, or not use a configuration file. Most simulators can work
    without one, and synthesis often doesn't use configuration files anyway.

    Regards,

    Pieter Hulshoff
     
    Pieter Hulshoff, Oct 1, 2004
    #4
  5. Ralf Hildebrandt <> wrote in message news:<>...

    > And if I read the related thread for this article, I only can find the
    > answer, that there is no way to specify the configuration for a block
    > deeper than one level away in general. Sorry, am I blind, or is this the
    > only answer?


    Not the only answer.
    When there is only one compiled module
    per component and the names match,
    you get a "default configuration"
    without doing anything. Also the
    last compiled architecture is the
    default when there is more than one.

    I prefer to use direct instances for
    structure and generic constants for options.

    -- Mike Treseler
     
    Mike Treseler, Oct 6, 2004
    #5
  6. Mike Treseler wrote:

    > I prefer to use direct instances for
    > structure and generic constants for options.


    This is impossible, if one tries to insert a number of instances of a
    subcomponent and this number depends on the generic parameter - but in
    general: ACK.



    O.k., many thanks to you and to Pieter for help!
    Ralf
     
    Ralf Hildebrandt, Oct 7, 2004
    #6
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