constants declaration

Discussion in 'VHDL' started by Benjamin Todd, Feb 12, 2004.

  1. does anyone know a quick method of declaring an alternating pattern with a
    variable length?

    constant FAIL_LOW : std_logic_vector (WATCH_LENGTH-1 downto 0) := (others
    => '0');
    -- above is great, you change WATCH_LENGTH and the rest is ok
    constant WATCH_STARTUP : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    "10101010";
    -- with this you have to make sure you dont forget to re-write the value!

    Ben

    --
    Benjamin Todd
    European Organisation for Nuclear Research
    Accelerator and Beam -- Control -- Infrastructure Division
    CERN, Geneva, Switzerland, CH-1211
    Building 864 Room 1 - A24
    Benjamin Todd, Feb 12, 2004
    #1
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  2. Benjamin Todd wrote:
    >
    > does anyone know a quick method of declaring an alternating pattern with a
    > variable length?
    >
    > constant FAIL_LOW : std_logic_vector (WATCH_LENGTH-1 downto 0) := (others
    > => '0');
    > -- above is great, you change WATCH_LENGTH and the rest is ok
    > constant WATCH_STARTUP : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    > "10101010";
    > -- with this you have to make sure you dont forget to re-write the value!


    A general solution is to define a function:

    function alternate(size : natural) return std_logic_vector is
    variable v_result : std_logic_vector(size-1 downto 0);
    begin
    for i in 0 to size-1 loop
    if ( (i mod 2) = 0 ) then
    v_result(i) := '0';
    else
    v_result(i) := '1';
    end if;
    end loop;
    return v_result;
    end alternate;

    and use it to initialize your constant:

    constant FAIL_LOW : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    alternate(WATCH_LENGTH);

    A quick and dirty solution is to define a constant that is as large as
    WATCH_LENGTH could ever reasonably be, initialize it with your pattern,
    and then take a slice of it to initialize your variable size vector:

    constant pattern : std_logic_vector(31 downto 0) :=
    "10101010101010101010101010101010";
    constant FAIL_LOW : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    pattern(WATCH_LENGTH-1 downto 0);

    This may be a bit less typing but has obvious problems if you can't put
    an upper bound on WATCH_LENGTH.
    --
    Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
    Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
    Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
    Tim Hubberstey, Feb 12, 2004
    #2
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  3. thanks!

    "Tim Hubberstey" <> wrote in message
    news:...
    > Benjamin Todd wrote:
    > >
    > > does anyone know a quick method of declaring an alternating pattern with

    a
    > > variable length?
    > >
    > > constant FAIL_LOW : std_logic_vector (WATCH_LENGTH-1 downto 0) :=

    (others
    > > => '0');
    > > -- above is great, you change WATCH_LENGTH and the rest is ok
    > > constant WATCH_STARTUP : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    > > "10101010";
    > > -- with this you have to make sure you dont forget to re-write the

    value!
    >
    > A general solution is to define a function:
    >
    > function alternate(size : natural) return std_logic_vector is
    > variable v_result : std_logic_vector(size-1 downto 0);
    > begin
    > for i in 0 to size-1 loop
    > if ( (i mod 2) = 0 ) then
    > v_result(i) := '0';
    > else
    > v_result(i) := '1';
    > end if;
    > end loop;
    > return v_result;
    > end alternate;
    >
    > and use it to initialize your constant:
    >
    > constant FAIL_LOW : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    > alternate(WATCH_LENGTH);
    >
    > A quick and dirty solution is to define a constant that is as large as
    > WATCH_LENGTH could ever reasonably be, initialize it with your pattern,
    > and then take a slice of it to initialize your variable size vector:
    >
    > constant pattern : std_logic_vector(31 downto 0) :=
    > "10101010101010101010101010101010";
    > constant FAIL_LOW : std_logic_vector(WATCH_LENGTH-1 downto 0) :=
    > pattern(WATCH_LENGTH-1 downto 0);
    >
    > This may be a bit less typing but has obvious problems if you can't put
    > an upper bound on WATCH_LENGTH.
    > --
    > Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
    > Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
    > Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
    Benjamin Todd, Feb 15, 2004
    #3
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