Control Register implementation

Discussion in 'VHDL' started by gommo, Oct 28, 2004.

  1. gommo

    gommo Guest

    I have a 8bit control register that in a PLD that resides at 0x330 on
    an ISA bus.

    I want to be able to have some bits in the control register read-only,
    read/write, and write-only.

    I have something like this

    process (IOR)
    begin
    if (Falling_edge(IOR) and CRS = '0') then
    -- Place the Control register onto the databus but ensure
    the write-only
    -- Data is correct
    SD <= (reg and "11111110");
    end if;
    end process;

    process (IOW)
    begin
    if (Falling_edge(IOW) and CRS = '0') then
    -- Read the data from the databus but don't write over the read-only
    bits
    reg(4) <= SD(4);
    reg(3) <= SD(3);
    reg(2) <= SD(2);
    reg(1) <= SD(1);
    reg(0) <= SD(0);
    end if;
    end process;

    However, doing it this way means that if I write data to the Data-bus I
    need to tri-state the databus somehow? How can I do this/ when and
    where???

    Thanks
    gommo, Oct 28, 2004
    #1
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. New User ^_^
    Replies:
    3
    Views:
    23,324
    sammy
    Aug 2, 2009
  2. gommo
    Replies:
    1
    Views:
    888
    rickman
    Oct 28, 2004
  3. Michael Tsang
    Replies:
    32
    Views:
    1,107
    Richard Bos
    Mar 1, 2010
  4. Michael Tsang
    Replies:
    54
    Views:
    1,193
    Phil Carmody
    Mar 30, 2010
  5. sanket
    Replies:
    7
    Views:
    1,003
    Tsung
    Nov 3, 2011
Loading...

Share This Page