convert Verilog code to vhdl (simple program) help me please

Discussion in 'VHDL' started by imaginary, Dec 2, 2009.

  1. imaginary

    imaginary

    Joined:
    Dec 2, 2009
    Messages:
    1
    Hello..

    I need to convert this Verilog code to VHDL , help me please..

    the program find the third power of x
    ex: if x=2 then the third power of x is 8

    ----------------------------
    module power3(
    output [7:0] XPower,
    output finished,
    input [7:0] X,
    input clk, start); // the duration of start is a
    single clock
    reg [7:0] ncount;
    reg [7:0] XPower;
    assign finished = (ncount == 0);
    always@(posedge clk)
    if(start) begin
    XPower <= X;
    ncount <= 2;
    end
    else if(!finished) begin
    ncount <= ncount - 1;
    XPower <= XPower * X;
    end
    endmodule
    ----------------------------------------
    imaginary, Dec 2, 2009
    #1
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. walala
    Replies:
    0
    Views:
    8,670
    walala
    Aug 1, 2003
  2. Guest
    Replies:
    1
    Views:
    4,402
    Paul Uiterlinden
    Nov 2, 2003
  3. Poly Diffusion
    Replies:
    2
    Views:
    1,399
  4. lovely
    Replies:
    1
    Views:
    7,925
    Jim Lewis
    Apr 12, 2004
  5. pplnet

    Verilog Code to VHDL Code

    pplnet, Dec 9, 2009, in forum: VHDL
    Replies:
    0
    Views:
    1,159
    pplnet
    Dec 9, 2009
Loading...

Share This Page