Converting logic_vector -> natural

[magik]

Hi

I want to convert vect(3 downto 0) into natural digit

is there any standard conversion procedure/function in vhdl for that??

Paul

 

[David Bishop]

Hi

I want to convert vect(3 downto 0) into natural digit

is there any standard conversion procedure/function in vhdl for that??

use ieee.numeric_std.all;

.....
variable natvar : natural;
variable vect : std_logic_vector (3 downto 0);
......

natvar := to_integer(unsigned(vect));

 

[magik]

thanx!!

I used conv_integer from std_logic_unsigned and the result is the same

 

[Ralf Hildebrandt]

I used conv_integer from std_logic_unsigned and the result is the same

Don't do it. First this library is /not/ a standard library. Your code is not protable.
Second you always assume /unsigned/ numbers in the vector. It is much better to treat
std_(u)logic_vectors neighter as signed nor as unsigned number in general and to choose it
using the conversion unsigned() or signed() dependend on the context.

O.k. - for your conversion to natural, which cover non-negative integers there is no
problem, but a conversion to integer would never lead to negative numbers.

Ralf

 

[kunal.bandekar]

Logic_vector to Natural

--CONSTANT declaration
constant COUNTER_LOGIC : integer := 8;

signal count : std_logic_vector (COUNTER_LOGIC-1 downto 0);


-- Felt it very useful if you want to avoid writing code multiple times and then thinking of scaling logic in the long run
start_of_frameopti_reg(conv_integer(count)) <= '1';
start_of_frameopti_reg((conv_integer(count))-1) <= '0';