Definition Multiply and Division in VHDL

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Hi ,
I want execute this line in vhdl and i have no error but after compile it with Orcad and define the signal .. after RUN i have this error : Run time error accure at time 0 ns :
a , b, is real array matrix ,
c,d just real

a(0,0) <= b(0,0) * (c/d)
and if you have any idea for improve it , plz tell tanks

plz help :stupido3:
 
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