defparam

Discussion in 'VHDL' started by jasonkee111, Mar 5, 2009.

  1. jasonkee111

    jasonkee111

    Joined:
    Dec 29, 2008
    Messages:
    5
    Hi. I have several modules that used the parameter in my verilog design. However it is very troublesome to do the change the value of the parameter for every module involved. Is there any way just to declare it once only on the top module? Thanks.
    jasonkee111, Mar 5, 2009
    #1
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