Design with IP-Cores on different FPGAs

S

sthauf

Hi,

i'm trying to find a solution for the problem above. I have several
different FPGAs and one vhdl design with some core functions. Is it
possible to design the vhdl code in such a way that the FPGA could be
selected with a generic and depending on the selected FPGA the specific
IP Core is selected.

BR Stefan
 
M

Mark McDougall

i'm trying to find a solution for the problem above. I have several
different FPGAs and one vhdl design with some core functions. Is it
possible to design the vhdl code in such a way that the FPGA could be
selected with a generic and depending on the selected FPGA the specific
IP Core is selected.

Yes, though I believe this is better off done with VHDL 'Configurations'
rather than generics.

Regards,
 
R

Ralf Hildebrandt

Is it
possible to design the vhdl code in such a way that the FPGA could be
selected with a generic and depending on the selected FPGA the specific
IP Core is selected.

Yes - You already have given the answer: if-generate or for-generate is
the solution.

gen_label_1 : if generic_param=1 generate
-- code for FPGA 1
end generate;

gen_label_2 : if generic_param=2 generate
-- code for FPGA 2
end generate;

-- and so on


In general VHDL could should be portable to any targets - ASIC and FPGA.
Unfortunately this is not possible every time (e.g. if one special macro
block of a FPGA has to be used).

=> Try to write as much as possible independent from the target. It
might be a good idea to not mix independent code blocks with
device-specific code blocks in one entity/architecture. (It would make
is easier to port to code to another target.)

Ralf
 

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