Display comments in Modelsim

[ALuPin]

Hi VHDL folks,

I want to display some comments on the wave window of Modelsim.

In my VHDL testbench I have the following signal assignments.
At the locations with *** I would like to see some comment
in the simulation wave.

Does somebody know how to realize that?



process
begin
t_store_ack_gmii <= '0';
t_ack_address <= (others => '0');
t_data_address_device <= (others => '0');
t_take_data_address <= '0';
t_in_rep_error <= '0';
*** comment 1

wait_delay; -- delay procedure
t_store_ack_gmii <= '1';
t_ack_address <= "10101010101";
wait until rising_edge(t_clk);
t_store_ack_gmii <= '0';
*** comment 2

wait_delay;
t_store_ack_gmii <= '1';
t_ack_address <= "10100000101";
wait until rising_edge(t_clk);
t_store_ack_gmii <= '0';
*** comment 3
wait;
end process:

Thank you for your help.

Kind Rgds

 

[Allan Herriman]

Hi VHDL folks,

I want to display some comments on the wave window of Modelsim.

In my VHDL testbench I have the following signal assignments.
At the locations with *** I would like to see some comment
in the simulation wave.

Does somebody know how to realize that?

Have you tried creating a signal of type "string" then assigning
values to it? Modelsim can display the string value in the waveform
window.

Regards,
Allan

 

[ALuPin]

Hi,

I have tried something like
signal l_show_in_wave : string(10 downto 0);

....
l_show_in_wave <= "Example ";

But the problem with that is that you have to define the range
with regard to the number of used characters.
I mean if the comment gets longer you have to change the
range and all other assignments.

Is there a more elegant way?

Thank you for your help.

 

[Tim Hubberstey]

I have tried something like
signal l_show_in_wave : string(10 downto 0);

...
l_show_in_wave <= "Example ";

But the problem with that is that you have to define the range
with regard to the number of used characters.
I mean if the comment gets longer you have to change the
range and all other assignments.

Is there a more elegant way?

Create an enumerated type and assign to it. The values that show up in
the wave window will be the same as what you use in your TYPE
declaration, except that they will be all lowercase. For example:

type states is (phase_1, phase_2, done);
signal whatsgoingon : states;
....
whatsgoingon <= phase_1;

 

[Ajeetha Kumari]

Hi,
Try a procedure with string as input, have the in_str argument
unconstrained and let the actuals determine the size. A skeleton code
is shown below. It is not perfect as the str_value update is
incomplete and error prone. One should use the length attribute and
loop through to update it properly, but this should get you started.

This code is NOT functionally correct, just the idea.

HTH,
Aji
http://www.noveldv.com

library ieee;
use ieee.std_logic_1164.all;

entity test is

end entity test;

architecture rtl of test is

signal str_value : string (1 to 100) := (others => ' ');

begin -- architecture rtl

t_proc: process is
procedure display_comment (
in_str : in string) is
variable len : natural := 1;
begin
len := in_str'length;
report "in_str is " & in_str severity note;
str_value <= in_str;
end procedure display_comment;

begin -- process t_proc
wait for 10 ns;
display_comment("Small string..");
wait for 10 ns;
display_comment("Longggggggggggggggg string..");
wait for 10 ns;
display_comment("some thing here");
wait;
end process t_proc;

end architecture rtl;