Double Clock Frequency

Discussion in 'VHDL' started by LearnVHDL, Mar 13, 2007.

  1. LearnVHDL

    LearnVHDL

    Joined:
    Mar 8, 2007
    Messages:
    6
    Dear All,

    How can I make the clk frequency faster without using the pll/dcm?? the rate doesn't have to be double, i just want to make it faster. Thanks.

    KK
    LearnVHDL, Mar 13, 2007
    #1
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  2. LearnVHDL

    scottcarl

    Joined:
    May 4, 2007
    Messages:
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    USA
    Dear KK,

    Sorry, but you can't do it without a pll/dcm. You can only make it slower.

    Scott
    scottcarl, May 17, 2007
    #2
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