Traditionally, this was correct (SRAM better than DRAM).
Current designs are starting to change the balance, as SRAM cells keep
getting smaller & so less gate capacitance (read, less "hit" energy
required to flip the bit), while DRAM cells get all the capacitance
the process can give, to extend the refresh time.
A partial disturb is remedied at once in SRAM, byt the normal flipflop
regeneration. In DRAM, it must wait for the next refresh.
:Ricky:
:
:Typically:
:
RAM's are 1 Capacitor & 1 Access Transistor.
:Leakage will cause the Capacitor to loose charge, and will need to be
:refreshed after a set amount of time.
:
:SRAM's are cross coupled transistors that retain the charge state through
:feedback. Usually transistors.
:
:Usually SRAM's are much more immune to EMI events than comparable technology
RAM's
:Note that both circuit types can be made more immune to EMI at the cost of
:size or power.
:
:YMMV
:-- Gerry
:
:
::> Hi,
:>
:> I just want to ask that we have a highly critical EMC compliant system. We
:> need to make a choice between SRAM or DRAM in this. So, my question is,
:> which one of these is less sensitive to EMI (better suited for EMC
:critical
:> applications).
:>
:> Thanks in advance.
:> ricky
:>
:>
: