EOF error.

Discussion in 'VHDL' started by Julien F., Jan 31, 2010.

  1. Julien F.

    Julien F. Guest

    Hello,

    I can't get rid of that error message: near EOF: syntax error. The
    code is quite simple:

    library ieee;
    library std;
    use ieee.std_logic_1164.all;

    Entity MUX2_1 IS
    PORT(i0: IN std_logic;
    i1: IN std_logic;
    ctr : IN std_logic;
    q : OUT std_logic);
    END MUX2_1;


    Thank you
     
    Julien F., Jan 31, 2010
    #1
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  2. Julien F.

    backhus Guest

    On 31 Jan., 21:44, "Julien F." <> wrote:
    > Hello,
    >
    > I can't get rid of that error message: near EOF: syntax error. The
    > code is quite simple:
    >
    > library ieee;
    > library std;
    > use ieee.std_logic_1164.all;
    >
    > Entity MUX2_1 IS
    >     PORT(i0: IN std_logic;
    >          i1: IN std_logic;
    >          ctr : IN std_logic;
    >          q : OUT std_logic);
    > END MUX2_1;
    >
    > Thank you


    Hi Julien,
    sometimes it's just a missing newline at the end of the last line.
    Just a guess.

    Have a nice synthesis
    Eilert
     
    backhus, Feb 1, 2010
    #2
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