Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE" does not contain primary u

Discussion in 'VHDL' started by feiyang, Nov 23, 2006.

  1. feiyang

    feiyang Guest

    use quartus 5.0
    when compile a project, give this messege:
    Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE"
    does not contain primary unit "std_logic_textio"
    how can i solve?
     
    feiyang, Nov 23, 2006
    #1
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  2. feiyang

    Ajeetha Guest

    TEXTIO is intended for simulation alone, not for synthesis, since
    Quartus is a synthesizer it doesn't like it. Why do you have that in
    your RTL file? Or may be you are passing your tetsbench file to
    Quartus?

    Regards
    Ajeetha, CVC
    www.noveldv.com
    feiyang wrote:
    > use quartus 5.0
    > when compile a project, give this messege:
    > Error: VHDL Use Clause error at quartustest.vhd(6): design library "IEEE"
    > does not contain primary unit "std_logic_textio"
    > how can i solve?
     
    Ajeetha, Nov 23, 2006
    #2
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