Event.....

Discussion in 'VHDL' started by Jack, Apr 17, 2004.

  1. Jack

    Jack Guest

    I am puzzled by the "event" attribute. I am not the most experienced digital
    designer yet, so apologize if my questions seems odd/simple.
    If I write the simple VHDL code (not showing entity,
    architecture-decleration etc.):

    SIGNAL myvector1: std_logic_vector(15 DOWNTO 0);
    SIGNAL mystate: std_logic_vector(2 DOWNTO 0);

    PROCESS
    BEGIN

    IF(myvector'EVENT) THEN
    mystate <= "001";
    END IF;

    END PROCESS

    What does the "EVENT" attribute actually translate to in hardware? How do
    you make an event detector. My problem is that I would like to have a
    statemachine that has two states and jumps to either states when an event
    occurs on two inputs. I could write the VHDL code but I am not sure how the
    event statement is actually implemented in regards to logic...anyone knows
    an answer to this question?

    Best Regards
    Jack
    Jack, Apr 17, 2004
    #1
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  2. Jack

    Andrew Hall Guest

    On Sat, 17 Apr 2004 13:42:53 +0200, Jack wrote:

    > I am puzzled by the "event" attribute. I am not the most experienced digital
    > designer yet, so apologize if my questions seems odd/simple.

    <snip>

    On its own the 'event attribute won't translate to anything as far as I'm
    aware. It signifies that something has happened to that signal. I've seen
    it used to detect rising edges of clocks like this:
    foo: process(clk) is
    begin
    if (clk'event and clk = '1') then
    --Something just happened to clk and it's now 1, so it was probably a
    --rising edge
    this_state <= next_state;
    end if;
    end process foo;

    I'm sure some of our more experienced brethren can think of all sorts of
    exciting stuff you can do with it.

    HTH,

    Andrew.
    Andrew Hall, Apr 17, 2004
    #2
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  3. Jack wrote:


    > IF(myvector'EVENT) THEN
    > mystate <= "001";
    > END IF;



    > What does the "EVENT" attribute actually translate to in hardware?


    Nothing. It is not synthesizeable.

    Dual-edge behavior may come with the new VHDL standard in the future.


    > How do you make an event detector.


    Take a clock, that is fast enough. Double buffer (2 flipflops in a
    chain) the signal, you want to trigger on (input-signal). Compare the
    two FFs: rising and falling edge of the input-signal is detectable.

    Note: A fast clock will consume a lot of power, but with a slow clock
    you may miss a too short event on the input-signal or get a big delay.


    Ralf
    Ralf Hildebrandt, Apr 17, 2004
    #3
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