false edge detection

Discussion in 'VHDL' started by apurva, Aug 18, 2006.

  1. apurva

    apurva Guest

    Hi everyone,

    Can someone please tell me how do I detect a false edge(glitch) in a
    clock signal?
    Any pulse with a pulse width considerablys shorter than the normal
    clock is considered as a false edge(glitch).

    Thanks in advance..
    Apurva
     
    apurva, Aug 18, 2006
    #1
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  2. apurva

    Jerry Avins Guest

    apurva wrote:
    > Hi everyone,
    >
    > Can someone please tell me how do I detect a false edge(glitch) in a
    > clock signal?
    > Any pulse with a pulse width considerablys shorter than the normal
    > clock is considered as a false edge(glitch).



    Is this a software question, or hardware? There are good solutions for
    specific problems, but there is no all-purpose solution.

    Jerry
    --
    Engineering is the art of making what you want from things you can get.
    ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
     
    Jerry Avins, Aug 18, 2006
    #2
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