fast synthesize

Discussion in 'VHDL' started by vbehravan, Apr 30, 2007.

  1. vbehravan

    vbehravan

    Joined:
    Nov 21, 2006
    Messages:
    4
    hi all,
    when I change my VHDL code a little (i.e. replace a<=not(b) with a<=b)
    and synthesize the code, all of sequences in ISE(translate,map,place and route,...) do from first to make .bit file and takes several minuits to complete.
    I expect since I changed only a little portion of hardware, ISE only change this section(in transleta,map and place&route) and make .bit file soon.
    is there any solution to make .bit file very fast for little change in code?
    regards.
     
    vbehravan, Apr 30, 2007
    #1
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