Flip Flop vs Registers

[Robert Chandler]

Hello

Well this has nothing to do with VHDL in special, its more about hardware
components in general. Hope I am right here.
Can I say that we use Flip Flops to store one bit, and to store more bits we
need a set of flip flops which is called a register.

Is this correct that a register consists of a bunch of flip flops? Or am I
completly wrong that there is no relationship between them at all?

Thanks
Robert

 

[Neo]

you are right.

 

[Ralf Hildebrandt]

Well this has nothing to do with VHDL in special, its more about hardware
components in general. Hope I am right here.
Can I say that we use Flip Flops to store one bit, and to store more bits we
need a set of flip flops which is called a register.

Is this correct that a register consists of a bunch of flip flops? Or am I
completly wrong that there is no relationship between them at all?

You are /almost/ right. ;-)

A flipflop is a storage element. Several storage elements form a
register (= "group of storage elements").
But latches are storage elemnts, too! And registers may consist also of
latches - or even a mix out of flipflops and latches.

Because flipflops are preferred in the most cases, often a register is a
group of flipflops.




This all holds for a HDL.
If you are looking at a CPU architecture the things called "register"
are usually groups of fast accessible storage groups (mostly flipflops,
but not nessecary).
For microcontrollers peripheral components may be mapped into RAM
address space. These components provide some storage groups. Often these
things are called peripheral register - or sloppy and misleading just
register.
Both CPU-register and peripheral register are often made of flipflops
(or sometimes latches), but accessing a peripheral register is the same
as accessing RAM while a CPU-register is accessed much faster.


Short: Depending on the topic "register" has several meanings. Everytime
the meaning is "group of storage elements". But in general it is not
defined how access to this "group of storage elements" is performed.
This depends on the topic you talk about. Furthermore it is undefined if
flipflopfs or latches are used to build this register.


Ralf

 

[DAVID BINNIE]

A Flip Flop is not a Register.

A Flip Flop output updates on every clock pulse whereas the Register output
will only change when an enable input is high. Just as well. A one bit
register can be made from a DFF and a gated clock.

Dr. B

 

[Mike Treseler]

A Flip Flop is not a Register.

For an fpga target, the primitive flop/register
has clk and d inputs, and optional CE, S, and R inputs.
There is nothing else but gates/LUTs and RAM.

A Flip Flop output updates on every clock pulse whereas the Register output
will only change when an enable input is high. Just as well. A one bit
register can be made from a DFF and a gated clock.

The CE input actually muxes in D or Q rather than gating the clock.
I agree that the term register usually implies two or more
bits with a common enable.

-- Mike Treseler

 

[Tim Hubberstey]

For an fpga target, the primitive flop/register
has clk and d inputs, and optional CE, S, and R inputs.
There is nothing else but gates/LUTs and RAM.



The CE input actually muxes in D or Q rather than gating the clock.
I agree that the term register usually implies two or more
bits with a common enable.

In my experience, "register" and "D-flip-flop" tend to be used
interchangeably in many cases. CPU interface "registers" that have only
a single flip-flop, with other bits hardwired to a fixed value, are
almost always referred to as registers. Then you have the Verilog "reg"
type which, I believe (not a Verilog guy), applies to any storage
element regardless of type or width.

Language, even technobabble, is an evolving thing. While I agree that
"register" _used_ to mean a collection of bits, I don't think it really
means that any more. This is no different than the currently accepted
definition of a "byte" as being 8 bits while the original definition was
"the smallest addressable unit of storage".

 

[Ralf Hildebrandt]

Tim Hubberstey wrote:

Then you have the Verilog "reg"
type which, I believe (not a Verilog guy), applies to any storage
element regardless of type or width.

The Verilog "reg" is misleading. You have to use this type when
assigning a value to a signal inside the always-statement (similar to
the VHDL process).

Outside (concurrent statements, component instantiations) you have to
use "wire".

Example:
wire sig1,sig2;
reg sig3;
wire sig4;

always @(sig1 OR sig2)
begin
sig3 <= sig1 & sig2;
end //always

assign sig4 = sig1 & sig2 & sig3;


I think the OP should specify the circumstances when "register" was /
should be mentioned, because there are some small but fine differences.


Ralf