floatfixlib synthesis

Discussion in 'VHDL' started by universeee, Nov 12, 2008.

  1. universeee

    universeee

    Joined:
    Apr 9, 2008
    Messages:
    3
    I ve written a code below which can be simulated but cannot be synthesized in Leonardo Spectrum ver. 2007a.37

    Here is the code
    Code:
    library IEEE;
    use IEEE.std_logic_1164.all;
    use IEEE.numeric_std.all;
    library floatfixlib;
    use floatfixlib.math_utility_pkg.all;
    use floatfixlib.fixed_pkg.all;
    
    entity test is
    	port(a,b: in sfixed(7 downto -6);
    	     c: out sfixed(8 downto -6));
    end test;
    
    architecture testing of test is
    begin
    
        c <= a+b;      
    
    end testing;
    Here is the synthesis error
    Code:
    -- Reading vhdl file C:/Documents and Settings/batur/Desktop/test.vhd into library work
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 5: Warning, math_utility_pkg is not declared in library floatfixlib.
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 6: Warning, fixed_pkg is not declared in library floatfixlib.
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 9: Error, sfixed is not a known type.
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 10: Error, sfixed is not a known type.
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 9: Error, sfixed requires 0 index values.
    "C:/Documents and Settings/batur/Desktop/test.vhd",line 10: Error, sfixed requires 0 index values.
    Error in file C:/Documents and Settings/batur/Desktop/test.vhd.
    -- Error found in VHDL source

    It says library error. Is Fixed point library "floatfixlib" synthesizable or not???
    How can we write fixed point code that is synthesizable?
    universeee, Nov 12, 2008
    #1
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