Floating point Mathematics

[Joseph]

I am working on a project to implement an FFT using an FPGA. For the
FFT i would need to use floating point numbers. I have read about the
IEEE 754 standard but I think that it is too cumbersome for this
application. I would prefer to implement a fix point representation.

Can anyone suggest a fixed point representation that that is efficient
and relatively accurate at the same time?

Joseph

 

[David Bishop]

I am working on a project to implement an FFT using an FPGA. For the
FFT i would need to use floating point numbers. I have read about the
IEEE 754 standard but I think that it is too cumbersome for this
application. I would prefer to implement a fix point representation.

Can anyone suggest a fixed point representation that that is efficient
and relatively accurate at the same time?

In VHDL-2007 there will be synthesizable fixed and floating point
packages. You will find copies VHDL-93 compatible copies of these
packages at this web page:

http://www.eda.org/fphdl/vhdl.html

Right now this page is pretty minimal, but I plan to expand the number
of vendors, and add some examples and some support code.

Documentation for these packages:
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Fixed_ug.pdf
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/Float_ug.pdf

 

[Tricky]

I am working on a project to implement an FFT using an FPGA. For the
FFT i would need to use floating point numbers. I have read about the
IEEE 754 standard but I think that it is too cumbersome for this
application. I would prefer to implement a fix point representation.

Can anyone suggest a fixed point representation that that is efficient
and relatively accurate at the same time?

Joseph

Altera provide floating point entities in their megafunction library.
Xilinx have similar libraries.

Converting to a fixed point representation can often be advantageous
as it offers greater precision at the expense of range. dedicated
multipliers are normally in 9x9,18x18 or 36x36 configurations, so to
be efficient it is often best to stick to a multiple of this (or
less). Also bear in mind that 1 18x18 multipler uses 4 9x9 multiplers,
and 36x36 4 18 bit multipliers, so 18 bits is often the most
efficient. FPGAs are designed for efficient fixed point number
mathematics, but the accuracy is up to you to decide.

No on can suggest a fixed point representaion that will be efficient
and accurate for your application unless you detail the application.
If you need floating point numbers to cover the range of possible
values, then fixed point numbers will probably not be practical: