fpga IOB

Discussion in 'VHDL' started by niyander, Oct 28, 2009.

  1. niyander

    niyander Guest

    hello,

    can some one tell me what's the use of IOB in FPGA, I have written a
    floating point multiplier in VHDL and after synthesis (ISE), in the
    design summery, i can see 99 IOB used, whats the use of it?
    secondly how can i reduce IOB usage.

    thanks
     
    niyander, Oct 28, 2009
    #1
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  2. niyander

    Andy Guest

    IOBs represent the FPGA physical pins. By default, most synthesis
    tools will assume that ports on the top level entity become pins on
    the FPGA. There is an option to disable this feature if you are just
    running a trial synthesis for a module that will eventually be
    embedded deeper inside your FPGA design.

    Andy
     
    Andy, Oct 28, 2009
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  3. niyander

    Andy Guest

    On Sunday, February 9, 2014 1:56:58 AM UTC-6, recow182 wrote:
    > How can I disable this feature?


    It depends on your synthesis tool...

    Look for a synthesis option called disable_io_insertion or similar (at least with Synplify).

    Andy
     
    Andy, Feb 10, 2014
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