FSM typical

[engrjet]

Hi
I'm facing a problem in FSM design.
If I use only a single state signal and modify it on clk it works
But if I use the conventional way of present_state<= next_state on clk and change the next_state on present state it does not work.
What can be the problem And its solution.
Please help.

Thanks and Regards
engrjet

 

[jeppe]

I believe your problem would be this line as a default value in the top of your nextstate-process.

Next_state <= Present_State;

Go to the buttom of this page.
http://jjmk.dk/MMMI/Exercises/04_Statemachine/No2_Implementation/exer4_2_implemtations.htm

Your welcome
Jeppe

 

[engrjet]

No !
I think I failed to explain the problem to you.
process(clk, rst)
begin
if rst = '0'
present_state<= reset;
elsif clk'event and clk= '1' then
present_state<= next_state;
end if;
end process;
process(present_state,.....)-- all the asynchronous signals for change of state.
case present_state is

 

[jeppe]

process(clk, rst)
begin
if rst = '0'
present_state<= reset;
elsif clk'event and clk= '1' then
present_state<= next_state;
end if;
end process;

process(present_state,.....)-- all the asynchronous signals for change of state.
Next_state <= Present_state; -- TRY THIS LINE
case present_state is