generic to 0 or 1

Discussion in 'VHDL' started by Brad Smallridge, Feb 19, 2010.

  1. Hello VHDL group,

    I have a need to translate a natural generic
    into a 0 or 1 constant something like:

    entity . . .
    generic(sim : natural . . .
    port( ...
    constant sim01 : natural := 0 if sim=0, else :=1;
    .. . .
    begin
    .. . .

    but of course this syntax doesn't fly.

    Brad
     
    Brad Smallridge, Feb 19, 2010
    #1
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  2. Brad Smallridge wrote:

    > constant sim01 : natural := 0 if sim=0, else :=1;


    >


    how about

    constant sim_c : boolean := sim=1;
     
    Mike Treseler, Feb 19, 2010
    #2
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  3. Brad Smallridge

    KJ Guest

    On Feb 18, 7:14 pm, "Brad Smallridge" <>
    wrote:
    > Hello VHDL group,
    >
    > I have a need to translate a natural generic
    > into a 0 or 1 constant something like:
    >
    > entity . . .
    > generic(sim : natural . . .
    > port( ...
    > constant sim01 : natural := 0 if sim=0, else :=1;
    > . . .
    > begin
    > . . .
    >
    > but of course this syntax doesn't fly.
    >
    > Brad


    Sometimes I find I like 'C' where you can implement a 2->1 selection
    quite concisely

    c = cond: a ? b; (at least I think that's the syntax).

    So much so, that I create a select function 'sel' that works
    similarly...and then override it to work with all the basic data types

    function sel(Cond: BOOLEAN; A, B: integer) return integer;
    function sel(Cond: BOOLEAN; A, B: real) return real;
    function sel(Cond: BOOLEAN; A, B: time) return time;
    etc.
    function sel(Cond: std_ulogic; A, B: integer) return integer;
    function sel(Cond: std_ulogic; A, B: real) return real;
    function sel(Cond: std_ulogic; A, B: time) return time;
    etc.

    While it's a bit of pain (but only one time) to create these headers,
    the function body itself is a straight copy and paste with virtually
    no editing for each variant.

    begin
    if (Cond = '1') then
    return(A);
    else
    return(B);
    end if;
    end function sel;

    I package that all up in a package with other generally useful
    functions that I routinely use so that for the example you want, I can
    simply say

    constant sim01 : natural := sel(sim, 0,1);

    Kevin Jennings
     
    KJ, Feb 19, 2010
    #3
  4. On Thu, 18 Feb 2010 16:14:48 -0800, "Brad Smallridge"
    <> wrote:

    >
    >Hello VHDL group,
    >
    >I have a need to translate a natural generic
    >into a 0 or 1 constant something like:
    >
    >entity . . .
    >generic(sim : natural . . .
    >port( ...
    >constant sim01 : natural := 0 if sim=0, else :=1;


    function to_yucky_C_truth_value(b: boolean)
    return integer
    is
    begin
    if b then return 1; else return 0; end if;
    end

    constant
    sim01: natural := to_yucky_C_truth_value(sim/=0);

    OK?
    --
    Jonathan Bromley
     
    Jonathan Bromley, Feb 19, 2010
    #4
  5. Brad Smallridge

    Dave Higton Guest

    In message <>
    Brian Drummond <> wrote:

    > On Thu, 18 Feb 2010 19:37:37 -0800 (PST), KJ <>
    > wrote:
    >
    > > Sometimes I find I like 'C' where you can implement a 2->1 selection
    > > quite concisely
    > >
    > > c = cond: a ? b; (at least I think that's the syntax).


    No...

    > For some reason when I see this syntax I expect it to select the values
    > from left to right according to increasing values of cond.


    c = cond ? a : b;
    is it true? yes or no

    That's my method of remembering it.

    Dave
     
    Dave Higton, Feb 19, 2010
    #5
  6. Brad Smallridge

    JimLewis Guest

    > constant sim01 : natural := 0 if sim=0, else :=1;

    constant sim01 : natural := 1 - boolean'pos(sim=0) ;
    -- disclaimer, I have not compiled this code and I
    -- have not tried this in a synthesis tool.

    Writing a function would make this more readable.
    Perhaps one that has a natural typed input.
    Pretty easy case statement.


    > > > c = cond: a ? b;  (at least I think that's the syntax).

    >
    > No...
    >
    > > For some reason when I see this syntax I expect it to select the values
    > > from left to right according to increasing values of cond.

    >
    > c = cond  ?  a  :  b;
    > is it true? yes or no
    >


    For VHDL-2008, we had a proposal for the following:
    constant sim01 : natural := 0 if sim = 0 else 1 ;
    it got modified to be:
    constant sim01 : natural := 0 if sim = 0, 1 ;
    which then got rejected due to ambiguity.

    With user backing, it would not be difficult to revive the
    first proposal but we really need more participating
    in the standards effort to make this happen.
    Furthermore to keep VHDL growing, we would also need
    to add more verification features to bring it up to
    system verilog capability. Since VHDL already has
    things like protected types, it is not a huge step -
    we just need more user backing.

    Best,
    Jim
     
    JimLewis, Feb 19, 2010
    #6
  7. Brad Smallridge

    JimLewis Guest


    > For VHDL-2008, we had a proposal for the following:
    >   constant sim01 : natural := 0 if sim = 0 else 1 ;
    > it got modified to be:
    >   constant sim01 : natural := 0 if sim = 0, 1 ;
    > which then got rejected due to ambiguity.
    >

    Reflecting on the other posts, I probably like
    KJ's post better than adding the if to the language.
    I would probably call it Mux2 rather than Sel though.
    I would probably also create a Mux4 at the same time.
    It would be nice to have a set of these type of
    functions in a standard package. Unfortunately if
    we did that through IEEE, they would not allow
    vendors to publish source code without paying
    around $50K to IEEE.

    Best,
    Jim
     
    JimLewis, Feb 19, 2010
    #7
  8. Brad Smallridge

    ralphmalph Guest

    On Feb 18, 7:14 pm, "Brad Smallridge" <>
    wrote:
    > Hello VHDL group,
    >
    > I have a need to translate a natural generic
    > into a 0 or 1 constant something like:
    >
    > entity . . .
    > generic(sim : natural . . .
    > port( ...
    > constant sim01 : natural := 0 if sim=0, else :=1;
    > . . .
    > begin
    > . . .
    >
    > but of course this syntax doesn't fly.
    >
    > Brad


    Maybe I am missing something, I'm not always up on what works and what
    doesn't work in VHDL. But why can't you directly assign the generic
    to the constant? Does that not work?

    entity . . .
    generic(sim : natural . . .
    port( ...
    constant sim01 : natural := sim;

    I know VHDL has a lot of issues having to do with when the tools know
    what, so the generic might not be available when you need to define
    the constant. But if that is the case, no method would work, right?

    Rick
     
    ralphmalph, Feb 19, 2010
    #8
  9. Brad Smallridge

    KJ Guest

    On Feb 19, 3:42 pm, JimLewis <> wrote:
    >
    > Reflecting on the other posts, I probably like
    > KJ's post better than adding the if to the language.
    > I would probably call it Mux2 rather than Sel though.


    I would've called the function 'select', but that keyword was already
    taken.

    KJ
     
    KJ, Feb 19, 2010
    #9
  10. Brad Smallridge

    KJ Guest

    On Feb 19, 4:44 pm, ralphmalph <> wrote:
    >
    > Maybe I am missing something, I'm not always up on what works and what
    > doesn't work in VHDL.  But why can't you directly assign the generic
    > to the constant?  Does that not work?
    >


    Well actually you're right, you CAN assign the generic directly to the
    constant...but I *think* what Brad intended in the original post was
    that 'sim' was either a boolean or std_logic, not a number and he
    wants to come out then with a number representing it...at least that's
    the way I misinterpreted it to be.

    KJ
     
    KJ, Feb 19, 2010
    #10

  11. > On Feb 19, 4:44 pm, ralphmalph <> wrote:
    >> Maybe I am missing something, I'm not always up on what works and what
    >> doesn't work in VHDL. But why can't you directly assign the generic
    >> to the constant? Does that not work?


    Ahh yes, but that would not distract me from my work.


    KJ wrote:
    > Well actually you're right, you CAN assign the generic directly to the
    > constant...but I *think* what Brad intended in the original post was
    > that 'sim' was either a boolean or std_logic, not a number and he
    > wants to come out then with a number representing it...at least that's
    > the way I misinterpreted it to be.


    I share your prejudice for the interesting interpretation ;)

    -- Mike Treseler
     
    Mike Treseler, Feb 19, 2010
    #11
  12. OK, what I'm hearing is that I need a function
    to make the conversion.

    I do need a natural because I use it
    as an argument in various arrays. I believe,
    that a boolean wouldn't work as an argument
    for an array.

    I had been setting sim to 0 or 1 but now
    I would like to send more options
    to the various modules under simulation.
    Perhaps have several arrays of sim values.

    Thanks all for the advice.

    > I have a need to translate a natural generic
    > into a 0 or 1 constant something like:
    >
    > entity . . .
    > generic(sim : natural . . .
    > port( ...
    > constant sim01 : natural := 0 if sim=0, else :=1;
    > . . .
    > begin
    > . . .
    >
    > but of course this syntax doesn't fly.
    >
    > Brad
    >
    >
     
    Brad Smallridge, Feb 22, 2010
    #12
  13. On Sun, 21 Feb 2010 18:06:24 -0800, "Brad Smallridge" wrote:

    >OK, what I'm hearing is that I need a function
    >to make the conversion.
    >
    >I do need a natural because I use it
    >as an argument in various arrays. I believe,
    >that a boolean wouldn't work as an argument
    >for an array.


    Why not? Not if you're trying to index into
    a std_logic_vector, of course, but if you can
    make a custom array type then it's perfectly
    OK for the subscript to be a boolean. Suppose,
    for example, you wanted to have an array of
    two integers indexed by boolean.

    type my_array_type is
    array (boolean) of integer;

    signal chooser: my_array_type;
    signal result: integer;
    ...

    chooser(TRUE) <= 55;
    chooser(FALSE) <= 100;
    ...
    result <= chooser(A >= B);
    -- result=55 if A>=B, result=100 if not.

    Any boolean expression will do as the subscript.
    Nice, or what?
    --
    Jonathan Bromley
     
    Jonathan Bromley, Feb 22, 2010
    #13
  14. Brad Smallridge

    Andy Guest

    On Feb 19, 3:50 pm, KJ <> wrote:
    > On Feb 19, 3:42 pm, JimLewis <> wrote:
    >
    >
    >
    > > Reflecting on the other posts, I probably like
    > > KJ's post better than adding the if to the language.
    > > I would probably call it Mux2 rather than Sel though.

    >
    > I would've called the function 'select', but that keyword was already
    > taken.
    >
    > KJ


    I prefer KJ's sel(), but maybe with argument names like if_true, and
    if_false, so you could call it with this:

    sel(sim = 0, if_true => 0, if_false => 1);

    I also like the constant boolean-indexed array that Jonathan proposed.

    Andy
     
    Andy, Feb 22, 2010
    #14
  15. >>OK, what I'm hearing is that I need a function
    >>to make the conversion.
    >>
    >>I do need a natural because I use it
    >>as an argument in various arrays. I believe,
    >>that a boolean wouldn't work as an argument
    >>for an array.

    >
    > Why not? Not if you're trying to index into
    > a std_logic_vector, of course, but if you can
    > make a custom array type then it's perfectly
    > OK for the subscript to be a boolean. Suppose,
    > for example, you wanted to have an array of
    > two integers indexed by boolean.
    >
    > type my_array_type is
    > array (boolean) of integer;
    >
    > signal chooser: my_array_type;
    > signal result: integer;
    > ...
    >
    > chooser(TRUE) <= 55;
    > chooser(FALSE) <= 100;
    > ...
    > result <= chooser(A >= B);
    > -- result=55 if A>=B, result=100 if not.
    >
    > Any boolean expression will do as the subscript.
    > Nice, or what?
    > --
    > Jonathan Bromley


    Hmm. Indexing arrays with enums seems odd to me,
    but I do find it in my reference books. So I could
    redefine my arrays as array(boolean) and write
    chooser(sim>0)? That's pretty clean.

    Brad Smallridge
     
    Brad Smallridge, Feb 24, 2010
    #15
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