Generics in VHDL - number of components

Discussion in 'VHDL' started by pbartosz, Mar 9, 2011.

  1. pbartosz

    pbartosz Guest

    I have an entity that is generic. For generic value N I'd like there
    were N the same components (with single input signal) connected to
    demultiplexer with N output signals. Is this doable (especially number
    of components dependent of generic value)? Sample code, please.
    pbartosz, Mar 9, 2011
    #1
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  2. pbartosz

    JB Guest

    On 9 mar, 13:40, pbartosz <> wrote:
    > I have an entity that is generic. For generic value N I'd like there
    > were N the same components (with single input signal) connected to
    > demultiplexer with N output signals. Is this doable (especially number
    > of components dependent of generic value)? Sample code, please.


    Yes it is doable, a generate loop can instantiate your N components.
    JB, Mar 9, 2011
    #2
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  3. pbartosz

    hhanff Guest

    On Mar 9, 3:00 pm, JB <> wrote:
    > On 9 mar, 13:40, pbartosz <> wrote:
    >
    > > I have an entity that is generic. For generic value N I'd like there
    > > were N the same components (with single input signal) connected to
    > > demultiplexer with N output signals. Is this doable (especially number
    > > of components dependent of generic value)? Sample code, please.

    >
    > Yes it is doable, a generate loop can instantiate your N components.


    E.g.:

    gen_ramb16_s1_s36 : for i in 0 to NUMBER_OF_RAMS_REQUIRED_C - 1
    generate
    RAMB16_S9_INSTANCE_NAME : RAMB16_S9
    -- synthesis translate_off
    generic map (
    INIT => bit_value,
    SRVAL => bit_value,
    write_mode => user_WRITE_MODE,
    -- [...]
    INITP_07 => vector_value)
    -- synopsys translate_on
    port map (
    DO => DO_RAM(i),
    DOP => open,
    ADDR => ADDR_RAM,
    CLK => tcm8230md_sys_clk,
    DI => tcm8239md_dout_s,
    DIP => (others => '0'),
    EN => '1', -- !!!
    SSR => '0',
    WE => WE_RAM(i));
    end generate;
    hhanff, Mar 9, 2011
    #3
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