Gray counter

[Guffi]

ast pisze:

Hi,

Do you know how to design a gray counter in VHDL ?

Better without a lookup table

The difficulty is to find a mathematical relation between the next state
and the current state.

thx

I think it was easy....
I think there was a mathematical solution using XOR gates
I'll try to find it and I'll write

 

[Guffi]

Guffi pisze:

ast pisze:
I think it was easy....
I think there was a mathematical solution using XOR gates
I'll try to find it and I'll write

I wrote it some time ago
Hmm... I haven't checked it but i think it change binary to grey number
- if I remember correctly




entity nbit_koder is
generic (N: integer :=4);
port(A : in std_logic_vector(n-1 downto 0);
--B : in std_logic_vector(n-1 downto 0);
C : out std_logic_vector(n-1 downto 0));
end nbit_koder;




architecture arch_nbit_koder of nbit_koder is



component xor_gate
port (A,B: in std_logic;
C: out std_logic
);
end component;

signal tmp:std_logic_vector(n-1 downto 0);

begin

G: for I in 0 to (n-2) generate
GG: xor_gate port map ( A(i), A(i+1), C(i) );
end generate;

c(n-1)<=a(n-1);
end arch_nbit_koder;




library IEEE;
use ieee.std_logic_1164.all;

entity xor_gate is
port (A,B: in std_logic;
C: out std_logic
);

end xor_gate;

architecture arch_xor_gate of xor_gate is
begin
c<=a xor b;

end arch_xor_gate;

 

[omahens]

Hello,

I study on FERI (http://www.feri.uni-mb.si/) electronic univirsity.

I must build a counter with PAL, which will count in Gray code from 0 to 9. Counter must have two inputes, load the numbers (input LOAD) and "start" or "ON" (input EN). When the counter goes in not allowed state (9 to 15), the counter must reset.

I using a program ABEL and I simulate the program with data *.jed...

I found this: http://www.asic-world.com/examples/verilog/gray.html but his don't work in my program...

I made a normal counter, but I don't know how to build it in Gray code. My program:

MODULE CNT
title 'stevec gor/dol'
D3..D0,URA,rst,cnten,ld,u_d pin;
D=[D3,D2,D1,D0];
Q3..Q0 pin istype'reg';

Q=[Q3,Q2,Q1,Q0];
X=.X.;
MODE=[cnten,ld,u_d,rst];
LOAD=(MODE==[X,1,X,X]);
HOLD=(MODE==[0,0,X,0]);
UP=(MODE==[1,0,1,0]);
DOWN=(MODE==[1,0,0,0]);
RESET=(MODE==[X,0,X,1]);
equations
Q.clk=URA;
WHEN (LOAD) THEN {WHEN (D>9) THEN Q:=9 ELSE Q:=D;}
ELSE WHEN (HOLD) THEN Q:=Q;
ELSE WHEN (UP) THEN {WHEN (Q==9) THEN Q:=0;
ELSE Q:=(Q+1);}
ELSE WHEN (DOWN) THEN{ WHEN (Q==0) THEN Q:=9;
ELSE Q:=(Q-1);}
ELSE WHEN (RESET) THEN Q:=0;

TEST_VECTORS
([u_d,rst,ld,cnten,URA,D3,D2
,D1,D0] -> [Q3,Q2,Q1,Q0])
[X,0,1,X,.c.,0,1,1,1] -> [0,1,1,1];//NALOŽI 7
[1,0,0,1,.c.,X,X,X,X] -> [1,0,0,0];//ŠTEJ GOR 7NA 8
[1,0,0,1,.c.,X,X,X,X] -> [1,0,0,1];//ŠTEJ GOR 8NA 9
[1,0,0,1,.c.,X,X,X,X] -> [0,0,0,0];//ŠTEJ GOR 9NA 0
[1,0,0,1,.c.,X,X,X,X] -> [0,0,0,1];//ŠTEJ GOR 0NA 1
[X,1,0,X,.c.,X,X,X,X] -> [0,0,0,0];//RESET
[X,0,1,X,.c.,1,1,1,1] -> [1,0,0,1];//NALOŽI 15 IN SPREMENI V 9
[X,0,1,X,.c.,0,1,1,0] -> [0,1,1,0];//NALOŽI 6
[0,0,0,1,.c.,X,X,X,X] -> [0,1,0,1];//ŠTEJ DOL IZ 6 NA 5
[X,0,1,X,.c.,0,0,0,0] -> [0,0,0,0];//NALOŽI 0
[0,0,0,1,.c.,X,X,X,X] -> [1,0,0,1];//ŠTEJ DOL IZ 0 NA 9
[X,0,0,0,.c.,X,X,X,X] -> [1,0,0,1];//HOLD
END​

*stevec gor/dol = counter up/down
*ŠTEJ GOR 7 na 8 = count up from 7 to 8
*ŠTEJ DOL IZ 6 na 5 = count down from 6 to 5

I just need counter in Gray and only for counting up... Thank you for your help!

Simon