Hardware Squaring in VHDL

Discussion in 'VHDL' started by Carl, Dec 6, 2004.

  1. Carl

    Carl Guest

    Hi

    I have got an input value (31 downto 0) and I want to square this value. In
    hardware this is easy I just have to
    expand this value to an array which is (63 downto 0) bits long and I have to
    add between every 2 coeffecients a zero. My problem is now how can I
    implement this in VHDL effecient.

    sure i would be possible that I say: result(1) <= inp(0);
    result(3) <= inp(1);

    and so on. This would be a lot of work to write this stuff. Is there another
    possibilty how I can address this problem?

    Thanks a lot for yout help

    C
     
    Carl, Dec 6, 2004
    #1
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  2. Carl wrote:
    > I have got an input value (31 downto 0) and I want to square this value.
    > In hardware this is easy I just have to
    > expand this value to an array which is (63 downto 0) bits long and I have
    > to add between every 2 coeffecients a zero. My problem is now how can I
    > implement this in VHDL effecient.
    >
    > sure i would be possible that I say: result(1) <= inp(0);
    > result(3) <= inp(1);
    >
    > and so on. This would be a lot of work to write this stuff. Is there
    > another possibilty how I can address this problem?


    PROCESS
    BEGIN

    WAIT UNTIL clk = '1';

    -- Default all bits to '0'
    --
    result <= (OTHERS => '0');

    -- Overwrite odd bits
    --
    FOR i IN 0 TO 31 LOOP
    result(i*2+1) <= inp(i);
    END LOOP;

    -- Reset condition: set result to 0
    --
    IF reset = '1' THEN
    result <= (OTHERS => '0');
    END IF;

    END PROCESS;

    Regards,

    Pieter Hulshoff
     
    Pieter Hulshoff, Dec 6, 2004
    #2
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  3. Carl

    Guest

    "Carl" <> writes:

    > I have got an input value (31 downto 0) and I want to square this value. In
    > hardware this is easy I just have to
    > expand this value to an array which is (63 downto 0) bits long and I have to
    > add between every 2 coeffecients a zero. My problem is now how can I
    > implement this in VHDL effecient.


    Perhaps I have misunderstood your algorithm: it would seem that this only very
    roughly approximates x^2 since you do not compute any of the partial products
    "between" the bits. Consider for example the number 7 in binary: 111. Your
    method turns it into 42 = 101010, rather than 49 = 110001. Other numbers
    produce even larger errors, especially powers of two which are off by a factor
    of 2.

    Here a table of the first few:

    N Computed Result Correct result
    7 => 101010 = 42 (49)
    8 => 10000000 = 128 (64)
    9 => 10000010 = 130 (81)
    10 => 10001000 = 136 (100)
    11 => 10001010 = 138 (121)
    12 => 10100000 = 160 (144)
    13 => 10100010 = 162 (169)
    14 => 10101000 = 168 (196)
    15 => 10101010 = 170 (225)
    16 => 1000000000 = 512 (256)
    17 => 1000000010 = 514 (289)
    18 => 1000001000 = 520 (324)
    19 => 1000001010 = 522 (361)
    20 => 1000100000 = 544 (400)
     
    , Dec 6, 2004
    #3
  4. Carl

    rickman Guest

    Carl wrote:
    >
    > Hi
    >
    > I have got an input value (31 downto 0) and I want to square this value. In
    > hardware this is easy I just have to
    > expand this value to an array which is (63 downto 0) bits long and I have to
    > add between every 2 coeffecients a zero. My problem is now how can I
    > implement this in VHDL effecient.
    >
    > sure i would be possible that I say: result(1) <= inp(0);
    > result(3) <= inp(1);
    >
    > and so on. This would be a lot of work to write this stuff. Is there another
    > possibilty how I can address this problem?


    As Pieter posted, a loop is ideal for your algorithm. But are you sure
    this works? Here is an example that does not go the way you
    described...

    "00011" x "00011" = "0000001001" vs. "0000001010"
    "00010" x "00010" = "0000000100" vs. "0000001000"
    "00001" x "00001" = "0000000001" vs. "0000000010"

    I guess this is not exactly what you are doing.

    --

    Rick "rickman" Collins


    Ignore the reply address. To email me use the above address with the XY
    removed.

    Arius - A Signal Processing Solutions Company
    Specializing in DSP and FPGA design URL http://www.arius.com
    4 King Ave 301-682-7772 Voice
    Frederick, MD 21701-3110 301-682-7666 FAX
     
    rickman, Dec 6, 2004
    #4
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