help about operation :s = c1 * 0.2+ c2 * 0.6 + c3 * 0.1

Discussion in 'VHDL' started by VHDL_HELP, Mar 1, 2007.

  1. VHDL_HELP

    VHDL_HELP Guest

    Hi every body ,
    i hope that you can help me , i want to do this operation:
    s = c1 * 0.2+ c2 * 0.6 + c3 * 0.1
    when i check the syntax , i have these errors
    ERROR:HDLParsers:808 - "C:/Xilinx/projet/operation.vhd" Line 44. * can
    not have such operands in this context.

    ----------------------------------------------------------------------------------------------------------------------------------------------------------------
    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.STD_LOGIC_ARITH.ALL;
    use IEEE.STD_LOGIC_UNSIGNED.ALL;

    entity operation is
    Port ( clk : in STD_LOGIC;
    c1 : in STD_LOGIC_VECTOR (7 downto 0);
    c2 : in STD_LOGIC_VECTOR (7 downto 0);
    c 3: in STD_LOGIC_VECTOR (7 downto 0);
    s: out STD_LOGIC_VECTOR (7 downto 0);

    end operation;

    architecture Behavioral of operation is

    begin

    s <=c1 * 0.2 + c2 * 0.6 + c3 * 0.1 ;

    end Behavioral;

    ----------------------------------------------------------------------------------------------------------------------------------------------------------
    and thanks for your help
     
    VHDL_HELP, Mar 1, 2007
    #1
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  2. VHDL_HELP

    KJ Guest

    1. Don't use std_logic_arith package, use numeric_std instead.
    2. In any case, with either package you can not multiply a
    std_logic_vector by a floating point number (i.e. 'c1 * 0.2', etc.)
    3. The result of a floating point expression is not a std_logic_vector
    (i.e. everything on the right hand side of your equation for 's
    <= ...' would have to be floating point).
    4. If you intend to synthesize this into real hardware you might want
    to consider multiplying by slightly different coefficients that have
    an exact binary representatio (if possible), otherwise look into fixed
    point representation methods. If you're simply trying to simulate but
    have no intention of putting this into real hardware then this point
    does not apply.

    Kevin Jennings.
     
    KJ, Mar 1, 2007
    #2
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  3. VHDL_HELP

    weber Guest

    On 1 mar, 11:37, "KJ" <> wrote:
    > 1. Don't use std_logic_arith package, use numeric_std instead.
    > 2. In any case, with either package you can not multiply a
    > std_logic_vector by a floating point number (i.e. 'c1 * 0.2', etc.)
    > 3. The result of a floating point expression is not a std_logic_vector
    > (i.e. everything on the right hand side of your equation for 's
    > <= ...' would have to be floating point).
    > 4. If you intend to synthesize this into real hardware you might want
    > to consider multiplying by slightly different coefficients that have
    > an exact binary representatio (if possible), otherwise look into fixed
    > point representation methods. If you're simply trying to simulate but
    > have no intention of putting this into real hardware then this point
    > does not apply.
    >
    > Kevin Jennings.


    I never implemented multiplication using a '*'... what will be
    synthesized?
    A good idea is to use hardwired multipliers, if possible.
    Cheers,
    weber
     
    weber, Mar 2, 2007
    #3
  4. VHDL_HELP

    KJ Guest

    On Mar 2, 11:00 am, "weber" <> wrote:
    >
    > I never implemented multiplication using a '*'... what will be
    > synthesized?

    Logic to implement a multiply operation.

    > A good idea is to use hardwired multipliers, if possible.

    If...
    - The targeted part has a multiplier
    - The synthesis tools that you're using support the multiply operator
    (i.e. '*')
    - The manner that you use the '*' operator doesn't conflict with the
    way that the hardware can implement it

    Then it will use a hardwired multiplier. The easiest way is to try it
    out in some code and see what the result is. Usually the only gotcha
    with being able to use the hardware multipliers has to do with getting
    data in and out because the hardware may have some input or output
    flops or something.

    If that's the case, then you'll find that "a <= b * c" will get fitted
    into the hardware multiplier only if it's in a clocked process. Like
    I said though, try it out with something simple or check the
    documentation for any restrictions/suggestions on inferring the
    hardware multiplier from your source code.

    Usually it either works straight off or there is some minor usage
    issue to resolve so that it doesn't generate the multiplier using
    logic blocks.

    Kevin Jennings
     
    KJ, Mar 2, 2007
    #4
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