Help for 4th order runge-kutta VHDL implementation

Discussion in 'VHDL' started by Guido, Sep 2, 2005.

  1. Guido

    Guido Guest

    Hi all!
    I was wondering if some of you could suggest me some document where I
    can find help in implementing a 4th order Runge-Kutta method on FPGA in
    VHDL.
    Relying on you I send you all my greetings
    Guido
     
    Guido, Sep 2, 2005
    #1
    1. Advertising

  2. Guido

    Ben Jones Guest

    Hi,

    > I was wondering if some of you could suggest me some document where I
    > can find help in implementing a 4th order Runge-Kutta method on FPGA in
    > VHDL.


    Why don't you try it, and tell us where you get stuck?

    -Ben-
     
    Ben Jones, Sep 2, 2005
    #2
    1. Advertising

  3. Guido

    Guest

    Guido wrote:
    > Hi all!
    > I was wondering if some of you could suggest me some document where I
    > can find help in implementing a 4th order Runge-Kutta method on FPGA in
    > VHDL.

    BTW, have you implemented the second order? Because then the fourth
    order method follows a bit directly.
    > Relying on you I send you all my greetings
    > Guido

    Just some pointers to solution of your problem. The Runge Kutta Method
    requires calculation of k-values. So you must have a set of addres and
    dividers to achieve the final step of caluclation y(n+1). The previous
    step to this is the caluclation of k-values. In my first opinion, that
    hardware would be fixed as it depends on the kind of differential eqn
    you want to integrate. You should store the outputs and reuse them for
    the next cycle. You can have a comparator to choose check the accuracy.
     
    , Sep 4, 2005
    #3
  4. Guido

    prabal

    Joined:
    Jan 28, 2009
    Messages:
    1
    dear all,
    I need to implement the point kinetic equation in VHDL using RK4. I have written the equations and tested in MATLAb. It works fine for very small step size (stiff equation).
    Can anybody guide me as to how i can write this code effectively in VHDL. The best optimising techniques so that the code can work effectively even with the small step size.
    Thanks
     
    prabal, Jan 29, 2009
    #4
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Chris Botha

    Re: 4th attempt: UDP Socket Bug

    Chris Botha, Jan 8, 2004, in forum: ASP .Net
    Replies:
    3
    Views:
    562
    Bryan Martin
    Jan 9, 2004
  2. Replies:
    45
    Views:
    1,067
    Seth Breidbart
    Feb 16, 2006
  3. Replies:
    0
    Views:
    299
  4. Replies:
    0
    Views:
    328
  5. afd
    Replies:
    1
    Views:
    8,356
    Colin Paul Gloster
    Mar 23, 2007
Loading...

Share This Page