HELP! VHDL real TYPE produces infinite decimal. How to approximateor reduce precision?

Discussion in 'VHDL' started by adam.kimura@googlemail.com, Jun 4, 2013.

  1. Guest

    Hello

    I am fairly new to VHDL and have hit a wall in my code.

    Basically, I am wanting to convert a 50% duty cycle frequency signal into aperiod with microsecond units. In VHDL, I perform a 1/frequency operationin order to get the period and then convert it to seconds. I declared theperiod as a real type. The problem I have is when I end up with a frequency that creates an infinite decimal for the period calculation (Example: 1/3 = 0.333333..... )My simulator cannot handle the infinite decimal.

    Is there a way to limit the precision of a REAL type number in VHDL? Should I use a floating point? I appreciate the help!
    , Jun 4, 2013
    #1
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  2. Guest

    Re: HELP! VHDL real TYPE produces infinite decimal. How toapproximate or reduce precision?

    Hello Alan,

    I think I got it working. I honestly don't know what happened. I was trying to re-create the error that I was getting, but it seemed to work fine now. Is there a limit on the number of decimal places a REAL type can have? From what I understood from the error message, the decimal places were infinite; which caused the simulation error. I understood this to mean that VHDL cannot represent such a number beyond a certain number of decimal places. In languages like C++, a number like 1/3 cannot be accurately represented since it is 0.3333333.... (re-occurring 3.) I have the situation where I am dividing 1 by decimal numbers... hence the long decimals.

    Thanks again for your help.

    ak


    On Tuesday, June 4, 2013 3:18:30 PM UTC-4, Alan Fitch wrote:
    > On 04/06/13 18:04, wrote:
    >
    > > Hello

    >
    > >

    >
    > > I am fairly new to VHDL and have hit a wall in my code.

    >
    > >

    >
    > > Basically, I am wanting to convert a 50% duty cycle frequency signal into a period with microsecond units. In VHDL, I perform a 1/frequency operation in order to get the period and then convert it to seconds. I declaredthe period as a real type. The problem I have is when I end up with a frequency that creates an infinite decimal for the period calculation (Example: 1/3 = 0.333333..... )My simulator cannot handle the infinite decimal.

    >
    > >

    >
    > > Is there a way to limit the precision of a REAL type number in VHDL? Should I use a floating point? I appreciate the help!

    >
    > >

    >
    >
    >
    > That sounds strange.
    >
    >
    >
    > Can you post the code and the error message?
    >
    >
    >
    > To answer you last question, REAL *is* floating point.
    >
    >
    >
    > regards
    >
    > Alan
    >
    >
    >
    > --
    >
    > Alan Fitch
    , Jun 5, 2013
    #2
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  3. rickman Guest

    Yes, the REAL data type in VHDL has limited precision just like most
    data types in programming languages. I'm not sure what error you might
    have seen. I can't think of anything in VHDL that would have a problem
    with your use of a REAL data type unless you were trying to synthesize
    it. To turn 1/3 into a real number you must first convert the 1 and the
    3 into reals and then divide them as real. No, it won't give you
    exactly 1/3, but it will not give you an error.

    I think the error must have been related to how you were trying to
    convert them.

    Rick



    On 6/4/2013 7:59 PM, wrote:
    > Hello Alan,
    >
    > I think I got it working. I honestly don't know what happened. I was trying to re-create the error that I was getting, but it seemed to work fine now. Is there a limit on the number of decimal places a REAL type can have? From what I understood from the error message, the decimal places were infinite; which caused the simulation error. I understood this to mean that VHDL cannot represent such a number beyond a certain number of decimal places. In languages like C++, a number like 1/3 cannot be accurately represented since it is 0.3333333.... (re-occurring 3.) I have the situation where I am dividing 1 by decimal numbers... hence the long decimals.
    >
    > Thanks again for your help.
    >
    > ak
    >
    >
    > On Tuesday, June 4, 2013 3:18:30 PM UTC-4, Alan Fitch wrote:
    >> On 04/06/13 18:04, wrote:
    >>
    >>> Hello

    >>
    >>>

    >>
    >>> I am fairly new to VHDL and have hit a wall in my code.

    >>
    >>>

    >>
    >>> Basically, I am wanting to convert a 50% duty cycle frequency signal into a period with microsecond units. In VHDL, I perform a 1/frequency operation in order to get the period and then convert it to seconds. I declared the period as a real type. The problem I have is when I end up with a frequency that creates an infinite decimal for the period calculation (Example: 1/3 = 0.333333..... )My simulator cannot handle the infinite decimal.

    >>
    >>>

    >>
    >>> Is there a way to limit the precision of a REAL type number in VHDL? Should I use a floating point? I appreciate the help!

    >>
    >>>

    >>
    >>
    >>
    >> That sounds strange.
    >>
    >>
    >>
    >> Can you post the code and the error message?
    >>
    >>
    >>
    >> To answer you last question, REAL *is* floating point.
    >>
    >>
    >>
    >> regards
    >>
    >> Alan
    >>
    >>
    >>
    >> --
    >>
    >> Alan Fitch

    >



    --

    Rick
    rickman, Jun 5, 2013
    #3
  4. Guest

    Re: HELP! VHDL real TYPE produces infinite decimal. How toapproximate or reduce precision?

    Thank you Rick... very helpful information. Thanks for taking the time to respond. I sincerely appreciate it!

    Best,

    Adam.


    On Tuesday, June 4, 2013 9:03:30 PM UTC-4, rickman wrote:
    > Yes, the REAL data type in VHDL has limited precision just like most
    >
    > data types in programming languages. I'm not sure what error you might
    >
    > have seen. I can't think of anything in VHDL that would have a problem
    >
    > with your use of a REAL data type unless you were trying to synthesize
    >
    > it. To turn 1/3 into a real number you must first convert the 1 and the
    >
    > 3 into reals and then divide them as real. No, it won't give you
    >
    > exactly 1/3, but it will not give you an error.
    >
    >
    >
    > I think the error must have been related to how you were trying to
    >
    > convert them.
    >
    >
    >
    > Rick
    >
    >
    >
    >
    >
    >
    >
    > On 6/4/2013 7:59 PM, wrote:
    >
    > > Hello Alan,

    >
    > >

    >
    > > I think I got it working. I honestly don't know what happened. I was trying to re-create the error that I was getting, but it seemed to work fine now. Is there a limit on the number of decimal places a REAL type can have? From what I understood from the error message, the decimal places wereinfinite; which caused the simulation error. I understood this to mean that VHDL cannot represent such a number beyond a certain number of decimal places. In languages like C++, a number like 1/3 cannot be accurately represented since it is 0.3333333.... (re-occurring 3.) I have the situation where I am dividing 1 by decimal numbers... hence the long decimals.

    >
    > >

    >
    > > Thanks again for your help.

    >
    > >

    >
    > > ak

    >
    > >

    >
    > >

    >
    > > On Tuesday, June 4, 2013 3:18:30 PM UTC-4, Alan Fitch wrote:

    >
    > >> On 04/06/13 18:04, wrote:

    >
    > >>

    >
    > >>> Hello

    >
    > >>

    >
    > >>>

    >
    > >>

    >
    > >>> I am fairly new to VHDL and have hit a wall in my code.

    >
    > >>

    >
    > >>>

    >
    > >>

    >
    > >>> Basically, I am wanting to convert a 50% duty cycle frequency signal into a period with microsecond units. In VHDL, I perform a 1/frequency operation in order to get the period and then convert it to seconds. I declared the period as a real type. The problem I have is when I end up with a frequency that creates an infinite decimal for the period calculation (Example: 1/3 = 0.333333..... )My simulator cannot handle the infinite decimal.

    >
    > >>

    >
    > >>>

    >
    > >>

    >
    > >>> Is there a way to limit the precision of a REAL type number in VHDL? Should I use a floating point? I appreciate the help!

    >
    > >>

    >
    > >>>

    >
    > >>

    >
    > >>

    >
    > >>

    >
    > >> That sounds strange.

    >
    > >>

    >
    > >>

    >
    > >>

    >
    > >> Can you post the code and the error message?

    >
    > >>

    >
    > >>

    >
    > >>

    >
    > >> To answer you last question, REAL *is* floating point.

    >
    > >>

    >
    > >>

    >
    > >>

    >
    > >> regards

    >
    > >>

    >
    > >> Alan

    >
    > >>

    >
    > >>

    >
    > >>

    >
    > >> --

    >
    > >>

    >
    > >> Alan Fitch

    >
    > >

    >
    >
    >
    >
    >
    > --
    >
    >
    >
    > Rick
    , Jun 5, 2013
    #4
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