How do I read binary file data in a test bench?

Discussion in 'VHDL' started by Pete Fraser, Oct 29, 2004.

  1. Pete Fraser

    Pete Fraser Guest

    Say I have a binary file containing compressed video.
    I want to present the dut in my test bench with a byte
    from the file at the dut's standard_logic_vector input,
    every clock period.

    What's the cleanest way to do this?
    Can I use a binary file, or do I need to convert it to:

    "xxxxxxxx"
    "xxxxxxxx"
    "xxxxxxxx"

    with one 8-bit slv per line.

    Is this simulator specific (I'll be using Modelim PE).

    Thanks
    Pete Fraser, Oct 29, 2004
    #1
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  2. mike_treseler, Oct 30, 2004
    #2
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  3. Pete Fraser

    Pete Fraser Guest

    Pete Fraser, Nov 1, 2004
    #3
  4. Pete Fraser

    Pete Fraser Guest

    "mike_treseler" <tres@fl_ke.com> wrote in message
    news:...
    > http://groups.google.com/groups?q=vhdl sim char_file
    >
    > -- Mike Treseler


    That worked nicely, but I can't work out how to
    convert from character to std_logic_vector.

    test_sig <= conv_std_logic_vector(my_char_v, 8)
    doesn't work.

    The FAQ suggests it's possible, and gives some hints, but I still don't get
    it.

    Thanks

    Pete
    Pete Fraser, Nov 3, 2004
    #4
  5. Pete Fraser wrote:

    > That worked nicely, but I can't work out how to
    > convert from character to std_logic_vector.


    function char2std(arg:character)
    return std_logic_vector is begin
    return std_logic_vector(to_unsigned(character'pos(arg),8));
    end char2std;

    -- Mike Treseler
    Mike Treseler, Nov 4, 2004
    #5
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