What would be the third choice ? IBM ?
Works for me. ...and verse visa. ;-)
Can a processor be produced with VHDL alone ? or is Cad/Cam still needed ?
VHDL is only a description of the function. It's really not *that*
much different than a schematic, or a blueprint for an airplane. The
logical representation of the widget still has to make it into the real
world. CAD (Computer Aided Design) is used to change the logical
description into a physical description. CAM (Computer Aided
Manufacturing) takes that physical description and turns it into
reality.
Hmm... VHDL probably needs to produce a Cad/Cam model ? so that it can be
produced/manufactured
(since the code is just text
)
So I do see the stupidity of my question
Not stupid at all. You got there.
But euhm... Does VHDL produce Cam/Cam output directly or are/can there be
multiple stages ?
Think of an onion. The designer's job is usually to peel only one
layer of the onion and pass it off to the next station. In this case A
high-level designer may use VHDL to simulate the deign and them pass it
off to another who will synthesize it into a netlist with lower level
components. Another will take that netlist and create a physical
representation of the design. Another will take the physical
representation and make the masks for the photocopier. ...and so it
goes until the onion is peeled.
Maybe like an intermediate language ? Probably
VHDL is the human interface. It gets compiled or "synthesized" into a
netlist. The netlist gets "placed and routed" into a physical design
(GL/1). That gets sent off to make masks, which in turn are used to
make the device.
Cool, both languages seem a little bit familiar.
Two sides of the same coin. Each has its benefits and drawbacks.
They've come much closer together over the years, each stealing from
the other. It's much a religious war these days (but Verilog sucks!
.
Though I am more a pascal/delphi programmer so I'll probably feel more at
home with VHDL... though Verilog seems to be a little bit shorter just like
C
C sucks too. ;-)
Can both compilers generate output which is compatible with each other or
cad/cam programs ? probably ?
Yes. In fact it's not too difficult to do one part of a design in
Verlion and another in VHDL, and still a third part with schematic
entry.
Cad/Cam programs can probably handle output of both languages ?
Sure. The synthesis outputs will look the same. The difference is in
the front end language processor.